Patents by Inventor David Beardsley Slater, Jr.

David Beardsley Slater, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7462861
    Abstract: An LED chip includes a bond pad suitable for thermosonic or thermocompression bonding such as Sn, AuSn or other metals. The physical dimensions of the bond pad are selected to discourage or prevent solder squeeze-out during thermocompression or thermosonic bonding with or without flux. In some embodiments, an AuSn bond pad is designed to accept 30 g to 70 g of force or more without squeeze-out.
    Type: Grant
    Filed: April 26, 2005
    Date of Patent: December 9, 2008
    Assignee: Cree, Inc.
    Inventors: David Beardsley Slater, Jr., John Adam Edmond
  • Patent number: 7432536
    Abstract: A method is disclosed for attaching a bonding pad to the ohmic contact of a diode while reducing the complexity of the photolithography steps. The method includes the steps of forming a blanket passivation layer over the epitaxial layers and ohmic contacts of a diode, depositing a photoresist layer over the blanket passivation layer, opening a via through the photoresist above the ohmic contacts and on the blanket passivation layer, removing the portion of the blanket passivation layer defined by the via to expose the surface of the ohmic contact, depositing a metal layer on the remaining photoresist, and on the exposed portion of the ohmic contact defined by the via, and removing the remaining photoresist to thereby concurrently remove any metal on the photoresist and to thereby establish a metal bond pad on the ohmic contact in the via.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 7, 2008
    Assignee: Cree, Inc.
    Inventor: David Beardsley Slater, Jr.
  • Patent number: 7402837
    Abstract: Methods of fabricating light emitting diodes and light emitting devices are provided that include a substrate, an n-type epitaxial region on the substrate and a p-type epitaxial region on the n-type epitaxial region. At least a portion of the p-type epitaxial region comprises a mesa with respect to the substrate. An ohmic contact is provided on an exposed portion of the p-type epitaxial layer. The ohmic contact is self aligned to a sidewall of the mesa and to the p-type epitaxial layer such that a sidewall of the ohmic contact is substantially aligned with a sidewall of the mesa and to the p-type epitaxial layer.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: July 22, 2008
    Assignee: Cree, Inc.
    Inventors: David Beardsley Slater, Jr., John Edmond, Ian Hamilton
  • Patent number: 7294859
    Abstract: A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first conductivity type into the first surface of a conductive silicon carbide wafer having the same conductivity type as the implanting ions at one or more predetermined dopant concentrations and implant energies to form a dopant profile, annealing the implanted wafer, and growing an epitaxial layer on the implanted first surface of the wafer.
    Type: Grant
    Filed: February 14, 2005
    Date of Patent: November 13, 2007
    Assignee: Cree, Inc.
    Inventors: Davis Andrew McClure, Alexander Suvorov, John Adam Edmond, David Beardsley Slater, Jr.
  • Patent number: 7259402
    Abstract: A method and resulting structures are disclosed for fabricating a high efficiency high extraction light emitting diode suitable for packaging. The method includes the steps of adding a light emitting active portion of wide-bandgap semiconductor material to a conductive silicon carbide substrate, joining the added active portion to a conductive sub-mounting structure, and removing a portion of the silicon carbide substrate opposite the added active portion to thereby reduce the overall thickness of the joined substrate, active portion and sub-mounting structure. The resulting the sub-mounting structure can be joined to a lead frame with the active portion positioned between the silicon carbide substrate and the sub-mounting structure to thereby use the sub-mounting structure to separate the active portion from the lead frame and avoid undesired electrical contact between the active portion and the lead frame.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: August 21, 2007
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Jayesh Bharathan, David Beardsley Slater, Jr.
  • Patent number: 7138291
    Abstract: A method is disclosed for treating a silicon carbide substrate for improved epitaxial deposition thereon and for use as a precursor in the manufacture of devices such as light emitting diodes. The method includes the steps of implanting dopant atoms of a first conductivity type into the first surface of a conductive silicon carbide wafer having the same conductivity type as the implanting ions at one or more predetermined dopant concentrations and implant energies to form a dopant profile, annealing the implanted wafer, and growing an epitaxial layer on the implanted first surface of the wafer.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: November 21, 2006
    Assignee: Cree, Inc.
    Inventors: Davis Andrew McClure, Alexander Suvorov, John Adam Edmond, David Beardsley Slater, Jr.
  • Patent number: 7125737
    Abstract: A physically robust light emitting diode is disclosed that offers high-reliability in standard packaging and that will withstand high temperature and high humidity conditions. The diode comprises a Group III nitride heterojunction diode with a p-type Group III nitride contact layer, an ohmic contact to the p-type contact layer, and a sputter-deposited silicon nitride composition passivation layer on the ohmic contact. A method of manufacturing a light emitting diode and an LED lamp incorporating the diode are also disclosed.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: October 24, 2006
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Brian Thibeault, David Beardsley Slater, Jr., Gerald H. Negley, Van Allen Mieczkowski
  • Patent number: 6825501
    Abstract: A physically robust light emitting diode is disclosed that offers high-reliability in standard packaging and that will withstand high temperature and high humidity condition. The diode comprises a Group III nitride heterojunction diode with a p-type Group III nitride contract layer, an ohmic contact to the p-type contact layer, and a sputter-deposited silicon nitride composition passivation layer on the ohmic contact. A method of manufacturing a light emitting diode and an LED lamp incorporating the diode are also disclosed.
    Type: Grant
    Filed: May 14, 2002
    Date of Patent: November 30, 2004
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Brian Thibeault, David Beardsley Slater, Jr., Gerald H. Negley, Van Allen Mieczkowski
  • Patent number: D582865
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: December 16, 2008
    Assignee: Cree, Inc.
    Inventors: John Edmond, David Beardsley Slater, Jr., Amber Christine Salter, Ashay Chitnis, James Ibbetson, Bernd Peter Keller