Abstract: System and method of memory utilization in a computer system are described. In one embodiment, the method comprises, responsive to receipt of a DMA transaction from an entity, determining whether a number of pending memory requests for the entity is less than a prefetch limit therefor; and responsive to a determination that the number of pending memory requests for the entity is less than the prefetch limit therefor, issuing a new memory request comprising a portion of the received DMA transaction.

Abstract: System and method of memory utilization in a computer system are described. In one embodiment, the method comprises, responsive to receipt of a DMA transaction from an entity, determining whether a number of pending memory requests for the entity is less than a prefetch limit therefor; and responsive to a determination that the number of pending memory requests for the entity is less than the prefetch limit therefor, issuing a new memory request comprising a portion of the received DMA transaction.

Abstract: System and method of memory utilization in a computer system are described. In one embodiment, the method comprises, responsive to receipt of a DMA transaction from an entity, determining whether a memory request comprising a cache line-sized portion of the DMA transaction is speculative; and responsive to a determination that the memory request is not speculative, ensuring that a prefetch lock indicator of a cache line of a cache associated with the memory request is in a locked condition, thereby preventing a cache replacement algorithm (“CRA”) from flushing the associated cache line.

Abstract: A computing device having partitions, and a method of communicating between partitions, are disclosed wherein at least one partition comprises: at least one register substantially always accessible to other partitions and capable of defining an address area; at least one address area that may be accessible to other partitions and is capable of being defined by the at least one register; and address areas other than the at least one accessible address area that are not accessible to other partitions. A method of processing interrupts comprising receiving an interrupt, assessing the origin of the interrupt, accepting, rejecting, or further assessing the interrupt, depending on its origin, when further assessing the interrupt, accepting or rejecting the interrupt depending on its contents, and forwarding accepted interrupts but not rejected interrupts to a target processor, and a device carrying out that method are also disclosed.

Abstract: A method of memory space allocation, performed within a coherent memory of a computer system, for allocating a line of the memory to a device using an ownership-only command, which transfers ownership of the line of memory without transferring the data contained within the line. After receiving the command, the memory then determines if the line was previously allocated to a second device using a conventional read command, the memory sends a flush command to the second device, and retrieves the contents of the line from the second device. After retrieving the contents of the line, or if the second device used the ownership-only command, the memory sends an ownership acknowledgment for the line to the first device, receives replacement data for the line from the first device, and then releases ownership of the line.