Patents by Inventor David Bisbee

David Bisbee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6230221
    Abstract: A data storage system wherein a host computer is coupled to a bank of disk drives through a system interface. The interface has a memory with a high address memory section and a low address memory section. A plurality of directors control data transfer between the host computer and the bank of disk drives as such data passes through the memory. A pair of high address busses electrically is connected to the high address memory and a pair of low address busses is electrically connected to the low address memory. Each one of the directors is electrically connected to one of the pair of high address busses and one of the pair of low address busses. A front-end portion of the directors is electrically connected to the host computer and a rear-end portion of the directors is electrically connected to the bank of disk drives.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: May 8, 2001
    Assignee: EMC Corporation
    Inventors: Christopher Mulvey, David Bisbee
  • Patent number: 6218821
    Abstract: A computer storage system includes director boards which control transfer of data to and between a host computer, a system cache memory and a disk array. The directors are provided with features which enhance system performance and reliability. A hardware emulation controller permits a high performance processor to be used with existing system circuitry. A control store memory is organized with primary and secondary data areas and primary and secondary parity areas. Data is written to both the primary and secondary areas. A read request accesses data in the primary area and performs a retry in the secondary area in the event of a parity error. A power supply system includes on-board marginable power supplies to facilitate testing and power-up by-pass circuits for protection of sensitive circuitry. A system clock configuration employs primary and secondary clocks to ensure redundancy of synchronized timekeeping.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: April 17, 2001
    Assignee: EMC Corporation
    Inventor: David Bisbee