Patents by Inventor David Brian Glasco
David Brian Glasco has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10042804Abstract: A multi-processor computer system is described in which transaction processing is distributed among multiple protocol engines. The system includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: GrantFiled: November 3, 2014Date of Patent: August 7, 2018Assignee: Sanmina CorporationInventors: Charles Edward Watson, Jr., Rajesh Kota, David Brian Glasco
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Publication number: 20150074325Abstract: A multi-processor computer system is described in which transaction processing is distributed among multiple protocol engines. The system includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: ApplicationFiled: November 3, 2014Publication date: March 12, 2015Applicant: MEMORY INTEGRITY, LLCInventors: Charles Edward Watson, JR., Rajesh Kota, David Brian Glasco
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Patent number: 8898254Abstract: A multi-processor computer system is described in which transaction processing is distributed among multiple protocol engines. The system includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: GrantFiled: September 9, 2013Date of Patent: November 25, 2014Inventors: Charles Edward Watson, Jr., Rajesh Kota, David Brian Glasco
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Publication number: 20140013079Abstract: A multi-processor computer system is described in which transaction processing is distributed among multiple protocol engines. The system includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: ApplicationFiled: September 9, 2013Publication date: January 9, 2014Applicant: Memory Integrity, LLCInventors: Charles Edward Watson, JR., Rajesh Kota, David Brian Glasco
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Patent number: 8572206Abstract: A multi-processor computer system is described in which transaction processing in each cluster of processors is distributed among multiple protocol engines. Each cluster includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller in each cluster comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: GrantFiled: December 15, 2011Date of Patent: October 29, 2013Assignee: Memory Integrity, LLCInventors: Charles Edward Watson, Jr., Rajesh Kota, David Brian Glasco
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Patent number: 8185602Abstract: A multi-processor computer system is described in which transaction processing in each cluster of processors is distributed among multiple protocol engines. Each cluster includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller in each cluster comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: GrantFiled: November 5, 2002Date of Patent: May 22, 2012Assignee: Newisys, Inc.Inventors: Charles Edward Watson, Jr., Rajesh Kota, David Brian Glasco
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TRANSACTION PROCESSING MULTIPLE PROTOCOL ENGINES IN SYSTEMS HAVING MULTIPLE MULTI-PROCESSOR CLUSTERS
Publication number: 20120089787Abstract: A multi-processor computer system is described in which transaction processing in each cluster of processors is distributed among multiple protocol engines. Each cluster includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller in each cluster comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.Type: ApplicationFiled: December 15, 2011Publication date: April 12, 2012Inventors: Charles Edward Watson, JR., Rajesh Kota, David Brian Glasco -
Patent number: 7577755Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished without the use of a dedicated wire.Type: GrantFiled: November 19, 2002Date of Patent: August 18, 2009Assignee: Newisys, Inc.Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
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Patent number: 7418517Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.Type: GrantFiled: January 30, 2003Date of Patent: August 26, 2008Assignee: Newisys, Inc.Inventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
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Patent number: 7346744Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for improving the accuracy of information available to a cache coherence controller are provided in order to allow the cache coherence controller to reduce the number of transactions in a multiple cluster system. Non-change probes and augmented non-change probe responses are provided to acquire state information in remote clusters without affecting the state of the probed memory line. Augmented probe responses associated with shared and invalidating probes are provided to update state information in a coherence directory during read and read/write probe requests.Type: GrantFiled: May 9, 2003Date of Patent: March 18, 2008Assignee: Newisys, Inc.Inventor: David Brian Glasco
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Patent number: 7334089Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for allowing a variety of transactions to complete locally are implemented by providing remote data caches associated with the various clusters in the system. The remote data caches receive data and state information for memory lines held in remote clusters. State information is provided to the remote data cache using various mechanisms including a coherence directory and augmented source done messages.Type: GrantFiled: May 20, 2003Date of Patent: February 19, 2008Assignee: Newisys, Inc.Inventor: David Brian Glasco
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Patent number: 7281055Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.Type: GrantFiled: May 28, 2002Date of Patent: October 9, 2007Assignee: Newisys, Inc.Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
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Patent number: 7251698Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.Type: GrantFiled: May 28, 2002Date of Patent: July 31, 2007Assignee: Newisys, Inc.Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
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Patent number: 7222262Abstract: Techniques and devices are provided for injecting transactions within computer systems having a plurality of multi-processor clusters. Each cluster includes a plurality of nodes, including processors, a service processor and an interconnection controller interconnected by point-to-point intra-cluster links. The processors and the interconnection controller in each cluster make transactions via an intra-cluster transaction protocol. Inter-cluster links are formed between interconnection controllers of different clusters. Each of the processors and the interconnection controller in a cluster has a test interface for communicating with the service processor. The service processor is configured to make an injected transaction according to the intra-cluster transaction protocol via one of the test interfaces.Type: GrantFiled: August 5, 2003Date of Patent: May 22, 2007Assignee: Newisys, Inc.Inventors: Guru Prasadh, David Brian Glasco, Rajesh Kota, Scott Diesing
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Patent number: 7155525Abstract: A multi-processor computer system is described in which address mapping, routing, and transaction identification mechanisms are provided which enable the interconnection of a plurality of multi-processor clusters, wherein the number of processors interconnected exceeds limited address, node identification, and transaction tag spaces associated with each of the individual clusters.Type: GrantFiled: May 28, 2002Date of Patent: December 26, 2006Assignee: Newisys, Inc.Inventors: David Brian Glasco, Carl Zeitler, Rajesh Kota, Guru Prasadh, Richard R. Oehler
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Patent number: 7039740Abstract: An interconnection controller for use in a computer system having a plurality of processor clusters is described. Each cluster includes a plurality of local nodes and an instance of the interconnection controller. The interconnection controller is operable to transmit locally generated interrupts to others of the clusters, and remotely generated interrupts to the local nodes. The interconnection controller is further operable to aggregate locally generated interrupt responses for transmission to a first remote cluster from which a first interrupt corresponding to the locally generated responses was generated. The interconnection controller is also operable to aggregate remotely generated responses for transmission to a first local node from which a second interrupt corresponding to the remotely generated responses was generated. A computer system employing such an interconnection controller is also described.Type: GrantFiled: July 19, 2002Date of Patent: May 2, 2006Assignee: Newisys, Inc.Inventors: David Brian Glasco, Carl Zeitler
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Patent number: 6920532Abstract: Cache coherence directory eviction mechanisms are described for use in computer systems having a plurality of multiprocessor clusters. Interaction among the clusters is facilitated by a cache coherence controller in each cluster. A cache coherence directory is associated with each cache coherence controller identifying memory lines associated with the local cluster which are cached in remote clusters. The cache coherence controller is operable to initiate eviction of an entry in its directory corresponding to a modified copy of a memory line by sending a request to merge an empty data field with the modified copy of the memory line to a corresponding memory controller.Type: GrantFiled: November 5, 2002Date of Patent: July 19, 2005Assignee: Newisys, Inc.Inventors: David Brian Glasco, Rajesh Kota, Sridhar K. Valluru
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Publication number: 20040236912Abstract: According to the present invention, methods and apparatus are provided for increasing the efficiency of data access in a multiple processor, multiple cluster system. Mechanisms for allowing a variety of transactions to complete locally are implemented by providing remote data caches associated with the various clusters in the system. The remote data caches receive data and state information for memory lines held in remote clusters. State information is provided to the remote data cache using various mechanisms including a coherence directory and augmented source done messages.Type: ApplicationFiled: May 20, 2003Publication date: November 25, 2004Applicant: Newisys, Inc. A Delaware corporationInventor: David Brian Glasco
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Publication number: 20040153507Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished with the use of a dedicated wire.Type: ApplicationFiled: January 30, 2003Publication date: August 5, 2004Applicant: Newisys, Inc. A Delaware corporationInventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota
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Publication number: 20040098475Abstract: Methods and apparatus are provided for improving the distribution of system management signals within a computer system complex. Mechanisms are provided for transmission both within a box and between computer system boxes. Local routing tables and general routing tables allow the distribution of system management signals precisely to resources associated with particular partitions. Signals are sequenced to put resources associated with one or more boxes in the appropriate states. The distribution of signals between boxes in the computer system complex can be accomplished without the use of a dedicated wire.Type: ApplicationFiled: November 19, 2002Publication date: May 20, 2004Applicant: Newisys, Inc., A Delaware CorporationInventors: Carl Zeitler, David Brian Glasco, Les Record, Richard R. Oehler, William G. Kulpa, Guru Prasadh, Rajesh Kota