Abstract: Aspects of the invention include optimization of via mesh specifications in an integrated circuit. Aspects include obtaining a first mesh specification for a cell within an integrated circuit, identifying, based on a simulation of a first via mesh built based on the first via mesh specification, portions of the first mesh specification for enhancement, and generating a second mesh specification for the cell, wherein the second mesh specification is different from the first mesh specification. Aspects also include generating a second via mesh based on the second via mesh specification, updating a design of the integrated circuit by replacing the first via mesh with the second via mesh and connecting a top layer of the second via mesh to the net, and saving the updated design of the integrated circuit based on a determination that the updated design of the integrated circuit passes a timing and design rule check.