Patents by Inventor David Brief

David Brief has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11126624
    Abstract: A method of searching a database that includes executing a trie search algorithm on a first portion of data in the database, returning a tag narrowing a location of the first portion of data to optimize the database, and performing a directed search of the optimized database by executing the trie search algorithm again on the optimized database, where the trie search algorithm is an information retrieval data structure using a M-ary tree where each node consists of a M-positional vector of pointers.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: September 21, 2021
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: David Brief, Eran Arad
  • Patent number: 11086852
    Abstract: Disclosed are systems and methods for providing an improved hardware-assisted multi-table database with reduced memory footprint. A method includes receiving a request to perform an operation on a selected logical table of a plurality of logical database tables. The method also includes accessing a data structure comprising a plurality of records each including: a logical table identifier corresponding to one of the plurality of logical database tables, wherein the logical table identifier is accessed from a register, and at least one sort key. The method also includes performing the operation using one or more sort criteria, wherein the one or more sort criteria are maintained for the selected logical table using the at least one sort key of the plurality of records corresponding to the selected logical table. The method also includes updating the data structure to reflect the performed operation.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: August 10, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: David Brief, Yoav Markus, Yuval Grossman
  • Patent number: 10727965
    Abstract: A system and method for time stamp synchronization are disclosed. In one embodiment, first and second devices are provided. The second device receives a first time stamp of the first device, wherein the first time stamp was generated in response to a time stamp synchronization event common to the first and second devices; generates a second time stamp of the second device in response to the time stamp synchronization event, wherein the first and second time stamps are in different time domains; and correlates the first and second time stamps, wherein correlating the first and second time stamps provide a relationship between the time domains because the first and second time stamps were both generated with respect to the same time stamp synchronization event common to the first and second devices.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: July 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: David Brief, Tomer Spector, Amir Rozen
  • Patent number: 10725687
    Abstract: A method for data protection in a memory system includes receiving, from entity, an address range and a set command, the address range corresponding to at least a portion of a memory partition in the memory system. The method further includes determining whether the entity is an authenticated entity. The method further includes based on the determination of whether the entity is an authenticated entity, setting, using the set command, access characteristics of the portion of the partition corresponding to the address range.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: July 28, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Rotem Sela, David Brief, Eliad Adi Klein
  • Patent number: 10621116
    Abstract: An apparatus includes an inversion circuit configured to invert a data word, a first partial-inversion circuit configured to invert a first portion of the data word, a second partial-inversion circuit configured to invert a second portion of the data word, and an output selection circuit configured to compare: the data word, an output of the inversion circuit, an output of the first partial-inversion circuit, and an output of the second partial-inversion circuit with a prior data word, and to select an output according to respective numbers of changed bits from the prior data word.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: April 14, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: David Brief
  • Publication number: 20200104295
    Abstract: Disclosed are systems and methods for providing an improved hardware-assisted multi-table database with reduced memory footprint. A method includes receiving a request to perform an operation on a selected logical table of a plurality of logical database tables. The method also includes accessing a data structure comprising a plurality of records each including: a logical table identifier corresponding to one of the plurality of logical database tables, wherein the logical table identifier is accessed from a register, and at least one sort key. The method also includes performing the operation using one or more sort criteria, wherein the one or more sort criteria are maintained for the selected logical table using the at least one sort key of the plurality of records corresponding to the selected logical table. The method also includes updating the data structure to reflect the performed operation.
    Type: Application
    Filed: June 27, 2019
    Publication date: April 2, 2020
    Inventors: David BRIEF, Yoav MARKUS, Yuval GROSSMAN
  • Patent number: 10387226
    Abstract: A system on a chip or storage device has a dynamic process for handling system events that are transmitted at varying transmission rates. This dynamic process is a hybrid mode of operation that tailors the use of time stamp information according to the dynamic flow of events that are submitted in the system. Relative time stamps can be used along with explicit time stamps. Periodic wrap around events which use relative time stamps based on the periodic wrap events may be suppressed when there were no events between consecutive wrap around events. When an asynchronous event occurs during the suppression, the event is identified with a high precision time stamp (HPTS) rather than a relative time stamp. The periodic wrap around events can be re-initiated after the HPTS event is stamped.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: August 20, 2019
    Assignee: Western Digital Technologies, Inc.
    Inventors: David Brief, Arseniy Aharonov, Amir Rozen, Asaf Gueta
  • Publication number: 20190158203
    Abstract: A system and method for time stamp synchronization are disclosed. In one embodiment, first and second devices are provided. The second device receives a first time stamp of the first device, wherein the first time stamp was generated in response to a time stamp synchronization event common to the first and second devices; generates a second time stamp of the second device in response to the time stamp synchronization event, wherein the first and second time stamps are in different time domains; and correlates the first and second time stamps, wherein correlating the first and second time stamps provide a relationship between the time domains because the first and second time stamps were both generated with respect to the same time stamp synchronization event common to the first and second devices.
    Type: Application
    Filed: November 21, 2017
    Publication date: May 23, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: David Brief, Tomer Spector, Amir Rozen
  • Publication number: 20190146856
    Abstract: A system on a chip or storage device has a dynamic process for handling system events that are transmitted at varying transmission rates. This dynamic process is a hybrid mode of operation that tailors the use of time stamp information according to the dynamic flow of events that are submitted in the system. Relative time stamps can be used along with explicit time stamps. Periodic wrap around events which use relative time stamps based on the periodic wrap events may be suppressed when there were no events between consecutive wrap around events. When an asynchronous event occurs during the suppression, the event is identified with a high precision time stamp (HPTS) rather than a relative time stamp. The periodic wrap around events can be re-initiated after the HPTS event is stamped.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 16, 2019
    Applicant: Western Digital Technologies, Inc.
    Inventors: David Brief, Arseniy Aharonov, Amir Rozen, Asaf Gueta
  • Publication number: 20180357280
    Abstract: A method of searching a database that includes executing a trie search algorithm on a first portion of data in the database, returning a tag narrowing a location of the first portion of data to optimize the database, and performing a directed search of the optimized database by executing the trie search algorithm again on the optimized database, where the trie search algorithm is an information retrieval data structure using a M-ary tree where each node consists of a M-positional vector of pointers.
    Type: Application
    Filed: June 11, 2018
    Publication date: December 13, 2018
    Inventors: David BRIEF, Eran ARAD
  • Publication number: 20180357188
    Abstract: An apparatus includes an inversion circuit configured to invert a data word, a first partial-inversion circuit configured to invert a first portion of the data word, a second partial-inversion circuit configured to invert a second portion of the data word, and an output selection circuit configured to compare: the data word, an output of the inversion circuit, an output of the first partial-inversion circuit, and an output of the second partial-inversion circuit with a prior data word, and to select an output according to respective numbers of changed bits from the prior data word.
    Type: Application
    Filed: June 8, 2017
    Publication date: December 13, 2018
    Applicant: C/O WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventor: David Brief
  • Publication number: 20170125070
    Abstract: Apparatus and method for hibernating part of a memory device are disclosed. A memory device may seek to reduce its power consumption by entering deep power down (DPD) mode. In DPD mode, power to a section of volatile memory in the memory device may be removed. To that end, the memory device stores in non-volatile memory all of the data stored in the section of volatile memory. The data stored in non-volatile memory is accessed upon exiting DPD mode. Upon subsequent entries into DPD mode, a differential, between the data stored in non-volatile memory and the data currently stored in the section of volatile memory subject to power removal, is generated and stored in non-volatile memory. Upon exit of the DPD mode, the data stored in non-volatile memory and the differential are used to recreate the data stored in volatile memory at entry into DPD mode.
    Type: Application
    Filed: October 29, 2015
    Publication date: May 4, 2017
    Inventors: Amir Hadar, Eli Menachem Elmoalem, David Brief, Tzachy Yizhaki
  • Patent number: 9400734
    Abstract: Apparatuses and methods implemented therein are disclosed for generating event codes that include the source of the events that caused the generation of the event codes. In one embodiment the apparatus comprises a memory, a processor, logic element and an event generator. The memory is configured to store instructions corresponding to a scheduler and instructions corresponding to a first thread and a second thread. The processor is configured to execute instructions corresponding to the scheduler wherein the scheduler selects a one of the first or second thread wherein the processor executes instructions corresponding to the selected one of the first or second thread. The logic element is configured to receive an identifier corresponding to the selected thread and a received asynchronous event. The logic element produces a concatenated event identifier comprising the thread identifier and the received asynchronous event.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: July 26, 2016
    Assignee: SanDisk Technologies LLC
    Inventors: Arseniy Aharonov, David Brief, Asaf Gueta
  • Patent number: 9244865
    Abstract: Systems, methods, and apparatuses are provided to obtain diagnostic information from a storage device. A read command may be transmitted to a storage device, where the read command conforms to a block level storage protocol and is directed to an unused logical unit of storage memory included in the storage device, to an invalid logical block address, and/or to a mode page. The unused logical unit may be a predetermined logical unit of the storage memory that is not allocated by a file system. Diagnostic data may be received from the storage device in response to the read command. The diagnostic data may be information related to operation of the storage device and/or a component of the storage device.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: January 26, 2016
    Assignee: SanDisk Technologies, Inc.
    Inventors: Neil David Hutchison, Sebastien Jean, Nagdi Tafish, Lee Gavens, David Brief
  • Publication number: 20150347325
    Abstract: Systems, methods, and apparatuses are provided to obtain diagnostic information from a storage device. A read command may be transmitted to a storage device, where the read command conforms to a block level storage protocol and is directed to an unused logical unit of storage memory included in the storage device, to an invalid logical block address, and/or to a mode page. The unused logical unit may be a predetermined logical unit of the storage memory that is not allocated by a file system. Diagnostic data may be received from the storage device in response to the read command. The diagnostic data may be information related to operation of the storage device and/or a component of the storage device.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 3, 2015
    Applicant: SanDisk Technologies, Inc.
    Inventors: Neil David Hutchison, Sebastien Jean, Nagdi Tafish, Lee Gavens, David Brief
  • Publication number: 20150082313
    Abstract: Apparatuses and methods implemented therein are disclosed for generating event codes that include the source of the events that caused the generation of the event codes. In one embodiment the apparatus comprises a memory, a processor, logic element and an event generator. The memory is configured to store instructions corresponding to a scheduler and instructions corresponding to a first thread and a second thread. The processor is configured to execute instructions corresponding to the scheduler wherein the scheduler selects a one of the first or second thread wherein the processor executes instructions corresponding to the selected one of the first or second thread. The logic element is configured to receive an identifier corresponding to the selected thread and a received asynchronous event. The logic element produces a concatenated event identifier comprising the thread identifier and the received asynchronous event.
    Type: Application
    Filed: May 13, 2014
    Publication date: March 19, 2015
    Applicant: SanDisk Technologies Inc.
    Inventors: Arseniy Aharonov, David Brief, Asaf Gueta
  • Publication number: 20150082325
    Abstract: Apparatuses and methods implemented therein are disclosed for generating event codes and time stamped events from the generated event codes. In one embodiment the apparatus comprises a register, a counter, a timestamp fraction generator and an event code generator. The register is configured to receive a one of a set of asynchronous events. The counter is configured to receive a clock signal and generate periodic events of a configurable periodicity. The timestamp fraction generator is coupled to the register and generates a timestamp fraction in response to receiving an asynchronous event by obtaining a count from the counter at substantially the same time that the event is received. Finally, the event code generator generates an event code from the timestamp fraction and an identifier corresponding to the event.
    Type: Application
    Filed: May 13, 2014
    Publication date: March 19, 2015
    Applicant: SanDisk Technologies Inc.
    Inventors: Arseniy Aharonov, David Brief, Asaf Gueta
  • Patent number: 8286188
    Abstract: An interprocess memory controller is described that may be used to provide multiple processes within a multi-process device with access to a shared physical memory. The described interprocess memory controller may enforce access rights to shared memory that has been allocated to the respective processes, thereby guarding the multi-process device from instability due to the unauthorized overwriting and/or unauthorized freeing of allocated memory. The described interprocess memory controller approach may streamline interprocess communication by allowing data associated with an interprocess communication to be passed from a first process to a second process by passing a pointer as well as access rights to a buffer in shared memory that contains the message data.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: October 9, 2012
    Assignee: Marvell Israel (M.I.S.L.) Ltd.
    Inventor: David Brief
  • Publication number: 20070104228
    Abstract: A system and method for reconstructing a service clock between two, first and second subsystems communicating therebetween, comprising a first subsystem operative to generate first subsystem timestamps, a second subsystem operative to generate second subsystem timestamps at a second frequency different from the first timestamps, wherein the generations of both first and second timestamps are based on sampling of the service clock by a common clock available at both subsystems, and an aligner for arithmetically aligning the different first and second subsystem timestamps to reconstruct the service clock.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 10, 2007
    Applicant: RESOLUTE NETWORKS, LTD.
    Inventors: Ron Cohen, Bar Gal-On, Zohar Peleg, David Brief
  • Patent number: 6678760
    Abstract: An apparatus for and method of transmitting and synchronizing isochronous data on a USB endpoint pipe are disclosed. Also disclosed are a double buffering capability, a transmission delay capability, a synchronization capability, and a clock adjustment capability.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: January 13, 2004
    Assignee: National Semiconductor Corporation
    Inventor: David Brief