Patents by Inventor David Burda

David Burda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8013586
    Abstract: A synchronous rectifier, including an energy storage element having a terminal; a power supply input, connected to the terminal of the storage element in a first time interval; a reference line connected to the terminal of the storage element in a second time interval; and a zero comparator, coupled to the terminal of the storage element to detect a current flowing in the energy storage element and disconnect the terminal of the storage element from the reference line upon detecting a zero current, the zero comparator having an offset and a propagation time; the zero comparator further having an offset control input and an output. An offset regulating loop is coupled between the output of the zero comparator and the offset control input and regulates the offset of the zero comparator to compensate the propagation time.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: September 6, 2011
    Assignee: STMicroelectronics Design and Application S.r.o.
    Inventors: Ondrej Tlaskal, Bohumil Janik, David Burda, Julien Picq, Miroslav Hukel
  • Publication number: 20080211473
    Abstract: A synchronous rectifier, including an energy storage element having a terminal; a power supply input, connected to the terminal of the storage element in a first time interval; a reference line connected to the terminal of the storage element in a second time interval; and a zero comparator, coupled to the terminal of the storage element to detect a current flowing in the energy storage element and disconnect the terminal of the storage element from the reference line upon detecting a zero current, the zero comparator having an offset and a propagation time; the zero comparator further having an offset control input and an output. An offset regulating loop is coupled between the output of the zero comparator and the offset control input and regulates the offset of the zero comparator to compensate the propagation time.
    Type: Application
    Filed: December 20, 2007
    Publication date: September 4, 2008
    Applicant: STMicroelectronics Design and Application s.r.o.
    Inventors: Ondrej Tlasksl, Bohumil Janik, David Burda, Julien Picq, Miroslav Hukel