Abstract: Some embodiments described herein are directed to a lid for a beverage container including a lid base, a closure, and a handle. The lid base may define a drinking opening therethrough. The closure may be coupled to the lid base and movable between a closed position in which the closure covers the drinking opening and an open position in which the closure does not cover the drinking opening. The handle may be coupled to the lid base and rotatable about a handle rotation axis. When the closure is in the closed position, the closure remains in the closed position when the handle is rotated within a first handle range. In response to the handle being rotated beyond the first handle range when the closure is in the closed position, the closure automatically moves from the closed position to the open position.

Abstract: A lid for a beverage container having a first drinking opening, a second drinking opening, and a selector. The selector is configured to linearly slide between a first position in which the first drinking opening is accessible and the second drinking opening is inaccessible, and a second position in which the second drinking opening is accessible and the first drinking opening is inaccessible.

Abstract: A threaded closure system includes a threaded opening and a threaded closure, where at least one thread of the threaded opening or the threaded closure has a leading portion with a steeper angle than the rest of the thread.

Abstract: An electronic device for controlling switching circuitry is described. The electronic device includes line voltage measuring circuitry configured to measure a line voltage to produce a line voltage measurement. The electronic device also includes load voltage measuring circuitry configured to measure a load voltage to produce a load voltage measurement. The electronic device further includes a processor coupled to the line voltage measuring circuitry and the load voltage measuring circuitry. The processor is configured to adjust a control signal for a transition of the switching circuitry based on the line voltage measurement and the load voltage measurement to minimize heat generation and electromagnetic interference creation by the switching circuitry.

Abstract: An electronic device for controlling switching circuitry is described. The electronic device includes line voltage measuring circuitry configured to measure a line voltage to produce a line voltage measurement. The electronic device also includes load voltage measuring circuitry configured to measure a load voltage to produce a load voltage measurement. The electronic device further includes a processor coupled to the line voltage measuring circuitry and the load voltage measuring circuitry. The processor is configured to adjust a control signal for a transition of the switching circuitry based on the line voltage measurement and the load voltage measurement to minimize heat generation and electromagnetic interference creation by the switching circuitry.

Abstract: A router, for routing at least one input signal to at least one output, comprises at least one input module and at least one output module. Each of the input and output modules includes at least one clock selector circuit for selecting from among a first and second clock signal, and an oscillator signal, as a common output clock signal for the at least first router, based in part on whether at least one of the first and second clock signals has toggled. The clock selector circuit provides redundancy as well as distribution of clock signals among elements within each module.

Abstract: A fully redundant linearly expandable router is comprised of first, second, third and fourth router components. Each router component includes first and second routing engines. First, second and third discrete links couple the first routing engine to the first routing engines, respectively. Fourth and fifth discrete links couple the first routing engine to the first routing engines, respectively. A sixth discrete link couples the routing engine to the routing engine. Seventh, eighth and ninth discrete links couple the second routing engine to the second routing engines, respectively. Tenth and eleventh discrete links couple the second routing engine to the second routing engines, respectively. A twelfth discrete link couples the routing engine to the router engine.

Abstract: A fault-tolerant router first and second router matrix card. The first and second router matrix cards receive a common set of 4n parity encoded input digital audio data streams and respectively generates therefrom, first and second sets of M output digital audio streams. As the first and second sets of data streams propagate along the first and second router matrix cards, respectively, one or more health bits are set whenever an error or other type of fault condition is detected. First and second parity check circuits are configured to detect parity errors and/or assess the relative health of the first and second sets of data streams and one of the two sets of data streams is selected as the output of the fault-tolerant router based upon either the parity error analysis, health analysis or both.

Abstract: A linearly expandable router is comprised of first, second, third and fourth router components. First, second and third discrete links couple an input side of a routing engine of the first router component (102) to an input side of a routing engine of the second, third and fourth router components. Similarly, fourth and fifth discrete links couple the input side of the routing engine for the second router component to the input side of the routing engine of the third and fourth router components, respectively. Finally, a sixth discrete link couples the input side of the routing engine for the third router component to the input side of the router engine for the fourth router component.

Abstract: Supportably mounted by each chassis of a multi-chassis broadcast router are primary router matrix cards, redundant router matrix cards and clock-demanding input and output cards. A first master clock firesides on the primary router matrix card of a first chassis while a second master clock firesides on the redundant router matrix card of a second chassis. Each master clock is configured to provide a respective common clock signal to all of the input and output cards of the first and second chassis. Control logic determines whether the first master clock or the second master clock issues the common clock signal.

Abstract: A signal sampling circuit receives a clock signal indicative of a sampling rate and a periodic input signal to produce a digitized sampled output signal. The sampled signal is applied to an all-pass filter having a single pole/zero pair in which the pole/zero values are determined by a number supplied by a number generator. The number generator varies the applied number in a random or pseudorandom fashion to create a correspondingly random or pseudorandom variation of the transfer function of the filter. The filtered sample signal is then further processed by an absolute value operator and an average value operator for application to an amplitude responsive device such as a meter. The random or pseudorandom variation of the filter transfer function introduces a corresponding random or pseudorandom variation of the phase shift imposed upon the sampled signal within the filter. This.