Abstract: A metal edge seal ring is formed in a trench made up of a large number of short, connected legs in perpendicular relation. Metal is deposited in the trench, and because the metal is comprised of many short segments rather than several long, straight sections, the subsequent chemical-mechanical polishing step does not cause significant cupping of the metal in the trench.

Abstract: Borderless vias are filled by initially depositing a thin, conformal layer of titanium nitride by chemical vapor deposition to cover an undercut, etched side surface of a lower metal feature. A metal, such as tungsten, is subsequently deposited to fill the borderless via. Embodiments include thermal decomposition of an organic-titanium compound, such as tetrakis-dimethylamino titanium, and treating the deposited titanium nitride in an H.sub.2 /N.sub.2 plasma to lower its resistivity.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device with an effective channel length that is less than the physical gate length avoids requiring improving the masking, lithography and etching process steps by increasing the implantation energy of a pre-amorphizing implant. The pre-amorphizing implant is performed after the doping of the source and drain areas and after activation of the dopants. The implantation energy is sufficient to introduce damage into the substrate to allow for increased movement of the dopants in the substrate. Subsequent annealing steps performed during silicidation cause the source and drain areas to expand toward each other and reduce the effective channel length. This channel length reduction leads to improved device performance through higher I.sub.dsat, etc.

Abstract: A method of manufacturing a semiconductor device with a steep retrograde profile. The threshold voltage adjust dopant layer and the punchthrough prevent dopant layer are formed in the substrate. All surface capping layers are removed from the active device regions and, the semiconductor device is placed in a chamber and a high vacuum is established after which an inert atmosphere is introduced into the chamber. The anneal to repair the damage to the lattice and to activate the dopant ions in the dopant layers is done in the inert atmosphere with the surface of the substrate maintained clean, that is, free from a capping oxide or other layer formed on the surface of the substrate.

Abstract: Borderless vias are filled by initially depositing a thin, conformal layer of titanium nitride by chemical vapor deposition to cover an undercut, etched side surface of a lower metal feature. A metal, such as tungsten, is subsequently deposited to fill the borderless via. Embodiments include thermal decomposition of an organic-titanium compound, such as tetrakis-dimethylamino titanium, and treating the deposited titanium nitride in an H.sub.2 /N.sub.2 plasma to lower its resistivity.

Abstract: A capacitor is provided for analog applications which can be fabricated with processes conventionally employed to fabricate digital circuitry and which has line spacing that is smaller than interlayer spacing. The capacitor of the present invention is based on intralayer capacitive coupling, rather than interlayer capacitive coupling which is conventionally employed in prior art capacitors. A capacitance can be achieved with the capacitor of the present invention that is higher than can be obtained with conventional capacitors occupying an area on the integrated circuit structure having similar size. Additionally, the capacitor of the present invention can be formed from upper metal layer such as metal-3, metal-4, and metal-5, and when the capacitor is formed from any of the upper metal layers the parasitic capacitance to ground is small.