Abstract: Disclosed is a method, system, and computer program product for automated implementation of pipeline flip-flops in an electronic design. Two operating modes can be used either together or separately to implement pipeline flip-flops. An analysis mode is employed to perform a determination of the number of stages of pipeline flip-flops needed for particular portions of an electronic design. A placement stage is used to place the pipeline flip-flops in the layout.

Abstract: A method for efficiently processing a design layout is described. In some embodiments, the method receives an original design layout and a modified design layout. The method identifies a change from the original design layout to the modified design layout by comparing the original and modified design layouts. The method of some embodiments then defines a region based on the location of the identified change within the modified design layout. The method performs a design operation (e.g., placing fills) only on the identified region of the modified design layout.

Abstract: A method for efficiently producing a design layout that includes several fills between and around nets of the design layout is described. The method of some embodiments first places a set of fills in the design layout. The method then performs a timing analysis on the design layout to find out the impact of the fills on the timing of the nets. The method identifies a region of the design layout in which to trim a set of fills in order to fix any timing violations of the nets. The method then trims the set of fills in the identified region. In some embodiments, the method employs different trimming strategies for trimming fills around different nets based on the characteristics of the nets.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Methods and systems for representing the limitations of a lithographic process using a pattern library instead of, or in addition to, using design rules. The pattern library includes “known good” patterns, which chip fabricators know from experience are successful, and “known bad” patterns, which chip fabricators know to be unsuccessful. The pattern library can be used to contain exceptions to specified design rules, or to replace the design rules completely. In some implementations, the pattern library contains statistical information that is used to contribute to an overall figure of merit for the design. In other implementations, a routing tool may generate a plurality of possible IC layouts, and select one IC layout based on information contained in the pattern library.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is an improved method and system for implementing metal fill for an integrated circuit design. When an engineering change order is implemented, the existing dummy metal fill geometries are initially ignored when modifying the layout, even if this results in shorts and/or other DRC violations. Once the ECO changes have been implemented, those violations caused by interaction between the changes and the metal fill are repaired afterwards.

Abstract: An improved method, system, and article of manufacture for reducing via failures is described. In one approach, additional vias or via cuts are inserted into an IC device to increase the number of cuts in a given area. The additional vias or via cuts are inserted until a sufficient via density level has been reached.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.

Abstract: Disclosed is a method, system, and article of manufacture for a one-pass approach for implementing metal-fill for an integrated circuit. Also disclosed is a method, system, and article of manufacture for implementing metal-fill that is coupled to a tie-off connection. An approach that is disclosed comprises a method, system, and article of manufacture for implementing metal-fill having an elongated shape that corresponds to the length of whitespace. Also disclosed is the aspect of implementing metal-fill that matches the routing direction. Yet another disclosure is an implementation of a place & route tool incorporating an integrated metal-fill mechanism.