Abstract: An apparatus for providing distributed router architecture includes a processing element and a resource availability element. The processing element may be configured to receive indications of receipt of data associated with a service for routing to a destination address. The resource availability element may be in communication with the processing element and may be configured to monitor resource usage over a plurality of distributed resource planes. The processing element may be further configured to allocate a resource associated with routing the data based on the monitored resource usage.

Abstract: An apparatus for providing distributed router architecture includes a processing element and a resource availability element. The processing element may be configured to receive indications of receipt of data associated with a service for routing to a destination address. The resource availability element may be in communication with the processing element and may be configured to monitor resource usage over a plurality of distributed resource planes. The processing element may be further configured to allocate a resource associated with routing the data based on the monitored resource usage.

Abstract: A method for making a semiconductor device is provided by (a) providing a substrate (203) having first (205) and second (207) gate structures thereon; (b) forming an underlayer (231) over the first and second gate structures; (c) removing the underlayer from the first gate structure; (d) forming a first stressor layer (216) over the first and second gate structures; and (e) selectively removing the first stressor layer from the second gate structure through the use of a first etch which is selective to the underlayer.

Abstract: A device for combining tomographic images with human vision using a half-silvered mirror to merge the visual outer surface of an object (or a robotic mock effector) with a simultaneous reflection of a tomographic image from the interior of the object. The device maybe used with various types of image modalities including ultrasound, CT, and MRI. The image capture device and the display may be enclosed in a sterile container (e.g., a probe bag) and a mirror and mirror housing may be separately attachable to the image capture device and display. In these embodiments, the mirror may be disposable and the sterility of the overall imaging device is maintained.

Abstract: An apparatus for providing distributed router architecture includes a processing element and a resource availability element. The processing element may be configured to receive indications of receipt of data associated with a service for routing to a destination address. The resource availability element may be in communication with the processing element and may be configured to monitor resource usage over a plurality of distributed resource planes. The processing element may be further configured to allocate a resource associated with routing the data based on the monitored resource usage.

Abstract: A device for combining tomographic images with human vision using a half-silvered mirror to merge the visual outer surface of an object (or a robotic mock effector) with a simultaneous reflection of a tomographic image from the interior of the object. The device maybe used with various types of image modalities including ultrasound, CT, and MRI. The image capture device and the display may be enclosed in a sterile container (e.g., a probe bag) and a mirror and mirror housing may be separately attachable to the image capture device and display. In these embodiments, the mirror may be disposable and the sterility of the overall imaging device is maintained.

Abstract: The present invention includes a method and a composition to form a layer on a substrate having uniform etch characteristics. To that end, the method includes controlling variations in the characteristics of a solid layer, such etch characteristics over the area of the solid layer as a function of the relative rates of evaporation of the liquid components that comprise the composition from which the solid layer is formed.

Abstract: An apparatus for providing distributed router architecture includes a processing element and a resource availability element. The processing element may be configured to receive indications of receipt of data associated with a service for routing to a destination address. The resource availability element may be in communication with the processing element and may be configured to monitor resource usage over a plurality of distributed resource planes. The processing element may be further configured to allocate a resource associated with routing the data based on the monitored resource usage.

Abstract: An apparatus for providing a distributed router architecture includes a processing element and a resource availability element. The processing element may be configured to receive indications of receipt of data associated with a service for routing to a destination address. The resource availability element may be in communication with the processing element and may be configured to monitor resource usage over a plurality of distributed resource planes. The processing element may be further configured to allocate a resource associated with routing the data based on the monitored resource usage.

Abstract: A device for combining tomographic images with human vision using a half-silvered mirror to merge the visual outer surface of an object (or a robotic mock effector) with a simultaneous reflection of a tomographic image from the interior of the object. The device maybe used with various types of image modalities including ultrasound, CT, and MRI. The image capture device and the display may be enclosed in a sterile container (e.g., a probe bag) and a mirror and mirror housing may be separately attachable to the image capture device and display. In these embodiments, the mirror may be disposable and the sterility of the overall imaging device is maintained.

Abstract: A method for making a semiconductor device is provided by (a) providing a substrate (203) having first (205) and second (207) gate structures thereon; (b) forming an underlayer (231) over the first and second gate structures; (c) removing the underlayer from the first gate structure; (d) forming a first stressor layer (216) over the first and second gate structures; and (e) selectively removing the first stressor layer from the second gate structure through the use of a first etch which is selective to the underlayer.

Abstract: An apparatus for providing a distributed router architecture includes a processing element and a resource availability element. The processing element may be configured to receive indications of receipt of data associated with a service for routing to a destination address. The resource availability element may be in communication with the processing element and may be configured to monitor resource usage over a plurality of distributed resource planes. The processing element may be further configured to allocate a resource associated with routing the data based on the monitored resource usage.

Abstract: The present invention is directed to a method of etching a multi-layer structure formed from a layer of a first material and a layer of a second material differing from the first material to obtain a desired degree of planarization. To that end, the method includes creating a first set of process conditions to etch the first material, generating a second set of process conditions to etch the second material; and establishing an additional set of process conditions to concurrently etch the first and second materials at substantially the same etch rate.

Abstract: The present invention features a method of patterning a substrate that includes forming from a first material, disposed on the substrate, a first film having an original pattern that includes a plurality of projections. The projections extend from a nadir surface terminating in an apex surface defining a height therebetween. A portion of the first film in superimposition with the nadir surface defines a nadir portion. The nadir portion is removed to expose a region of the substrate in superimposition therewith, defining a plurality of recessions. A second material is disposed upon the first film to form a second film having a surface spaced-apart from the apex surface of the plurality of projections and filling the plurality of recessions to form a multi-film stack. The first film and portions of the second film are removed to create a plurality of spaced-apart projections of the second material on the substrate.

Abstract: An interconnect structure in back end of line (BEOL) applications comprising a tunable etch resistant anti-reflective (TERA) coating is described. The TERA coating can, for example, be incorporated within a single damascene structure, or a dual damascene structure. The TERA coating can serve as part of a lithographic mask for forming the interconnect structure, or it may serve as a hard mask, a chemical mechanical polishing (CMP) stop layer, or a sacrificial layer during CMP.

Abstract: A method for forming a mechanically strengthened feature in a low-k dielectric film on a substrate includes using either spin-on-dielectric (SOD) techniques, or chemical vapor deposition (CVD) techniques to form a low-k dielectric film on the substrate. A sidewall of the feature in the low-k dielectric film is then treated in order to increase the film's mechanical strength. Treatment of the sidewall of the feature in the low-k dielectric film comprises forming a hardened layer by subjecting the low-k dielectric film to low energy, high flux ion implantation. Process parameters of the ion implantation are selected such that the implantation process does not cause a substantial change in the dielectric constant of the low-k dielectric film.

Abstract: A semiconductor device includes a semiconductor substrate, a film stack formed on the semiconductor substrate and having a film to be processed. A dual hard mask included in the film stack has an amorphous carbon layer and an underlying hard mask layer interposed between the amorphous carbon layer and the film to be processed, the hard mask layer does not include an amorphous carbon layer. A damascene structure for a metal interconnect is formed in the film stack. The amorphous carbon film can, for example, be incorporated within a single damascene structure, or a dual damascene structure. The amorphous carbon film can serve as part of a lithographic mask for forming the interconnect structure, or it may serve as a top layer of a dual hard mask, a chemical mechanical polishing (CMP) stop layer, or a sacrificial layer during CMP.

Abstract: A transceiver is described which utilizes D-shaped optical fiber technology and advanced flip chip mounting techniques for manufacturing an integrated transceiver chip for use in electronic microcircuit applications. A single D-shaped optical fiber is used for bi-directional signal transmission, with coupling gratings superimposed on the flat surface of the fiber for coupling light into and out of the optical fiber. A light source and optical detector, aligned with the respective coupling grating for optical communication with the fiber, are flip mounted on the substrate which supports the fiber. Finally, the light source and optical detector are electrically connected with associated electronic circuitry also mounted or fabricated on the substrate.

Abstract: A distributed cell field-effect transistor (FET) amplifier (40) includes a plurality of parallel, elongated source (46a) and drain (46b) regions of individual FET unit cells (46) formed in a substrate (42) in transverse alternating relation, with a plurality of elongated channel regions (46c) being formed between and parallel to adjacent source (46a) and drain (46b) regions respectively. A source foot (48) and a drain foot (50) extend perpendicular to the source (46a) and drain (46b) regions on opposite longitudinally spaced sides thereof respectively. A gate foot (52) extends parallel to the source (48) and drain (50) feet, between the source foot (48) and the cells (46). Source (54) and drain (56) pads and gate (58) fingers extend from the source (48), drain (50) and gate (52) feet into electrical connection with the respective source (46a), drain (46b) and gate ( 46c) regions respectively.

Abstract: A digital phase shift apparatus having a pair of single gate FETs which are connected in a common source configuration. Transmission line segments which respectively connect the sources and drains of the FET pair, provides a phase shift to an applied RF signal. The operating FET provides signal gain as well as switch the signal path length.