Abstract: ASIC libraries generally have some form of multi-port register file with 2 or more write ports and 2-8 read ports. Such register files can be exploited to implement a memory system using less external logic (fewer external-to-the memory MUXes to achieve desired narrow read ports) and/or fewer RAM instances. The desired memory system (including a single multi-port RAM that is configured to have a single very-wide write port and multiple narrow read ports) will then no longer require multiple instances of RAMs, and will therefore require less area due to overall reduced bit density.