Abstract: A high data rate signal combiner (HDRSC), including: a first analog to digital converter (ADC) configured to convert a first radio frequency (RF) signal from a first antenna into a first digital signal; a second ADC configured to convert a second RF signal from a second antenna into a second digital signal; a first circular buffer configured to store the first digital signal from the first ADC; a second circular buffer configured to store the second digital signal from the second ADC; a cross-correlator configured to cross correlate the first digital signal and the second digital signal; a lag peak search circuit configured to determine the location of a peak in the output of the cross-correlator; a vector adder circuit configured to combine the first digital signal and the second digital signal with a delay on one of the first signal and the second digital signal based upon the location of the peak in the output of the cross-correlator; and a digital to analog converter (DAC) configured to convert the combin

Abstract: An indium phosphide based double hetero junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.

Abstract: An indium phosphide based double hetero junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.

Abstract: An electronic circuit includes a current mirror bias circuit and a power amplifier that has a power transistor for amplifying radio frequency signals such that the output collector current of the power transistor is approximately constant over a wide range of varying power supply voltages. The power transistor is biased by a current mirror biasing circuit that has a reference voltage that maintains the quiescent DC collector current at an approximately constant value. The reference voltage may be varied to provide control of the output power of the power amplifier.

Abstract: An indium phosphide based double hetero-junction bipolar transistor with an increased collector-base breakdown voltage and a reduced operational knee voltage is provided by manipulating the conductivity in the collector region. The collector is formed using layers of different conductivities, with a region of the collector relatively close to the base being unintentionally or low doped. A voltage drop across the unintentionally doped region reduces the maximum value of the electric field and the velocity of carriers injected into the collector region at the base-collector junction. The conductivity throughout the collector region may be graded such that the highest conductivity occurs near the sub-collector and lowest conductivity occurs near the base region.