Patents by Inventor David Charles Steele

David Charles Steele has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11658888
    Abstract: A network timing view provides enhanced visualization for synch timing in support of mobile (4G/5G deployments) and others requiring sync. It allows network managers to view relevant synch data both textually and graphically displayed on the network map nodes and links in a unified view. The user is able to select the appropriate filter on the network map to show the 1588/SyncE connectivity and relevant nodes that are participating in delivering timing. It allows a user to trace the timing path from any timing device upstream to the clock source. It also allows the user to interactively discover and navigate downstream timing paths from any timing device, similar to exploring a tree hierarchy. The timing topology and path data provided allows a user to investigate the timing network for troubleshooting purposes such as timing alarms and events, sync problems, clock quality levels and clock states.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: May 23, 2023
    Assignee: Ciena Corporation
    Inventors: Peter Brett Sinclair, David Charles Steele, Blair Edward Paul Moxon
  • Publication number: 20220376997
    Abstract: A network timing view provides enhanced visualization for synch timing in support of mobile (4G/5G deployments) and others requiring sync. It allows network managers to view relevant synch data both textually and graphically displayed on the network map nodes and links in a unified view. The user is able to select the appropriate filter on the network map to show the 1588/SyncE connectivity and relevant nodes that are participating in delivering timing. It allows a user to trace the timing path from any timing device upstream to the clock source. It also allows the user to interactively discover and navigate downstream timing paths from any timing device, similar to exploring a tree hierarchy. The timing topology and path data provided allows a user to investigate the timing network for troubleshooting purposes such as timing alarms and events, sync problems, clock quality levels and clock states.
    Type: Application
    Filed: February 25, 2022
    Publication date: November 24, 2022
    Inventors: Peter Brett Sinclair, David Charles Steele, Blair Edward Paul Moxon
  • Patent number: 6400859
    Abstract: The matched nodes provide protection for a failure in the connection between two bidirectional line switched rings. They use a secondary path in case of a primary path failure. The secondary path is set aside in either the working or protection bandwidth of the rings, thus wasting resources. The invention uses a dedicated secondary path between the primary and secondary nodes. With the invention, no ring protection mechanisms are compromised and the ring bandwidth is not wasted. Middle nodes also realize full add/drop capabilities.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: June 4, 2002
    Assignee: Nortel Networks Limited
    Inventors: Evert de Boer, Peter William Phelps, Louis Rene Pare, David Charles Steele, Stephen Wilson
  • Patent number: 6259837
    Abstract: The matched nodes provide protection for a failure in the connection between two bidirectional line switched rings. They use a secondary path in case of a primary path failure. The secondary path is set aside in either the working or protection bandwidth of the rings, thus wasting resources. The invention uses inter-ring protection mechanisms which do away with a specifically set aside secondary path between the primary and secondary nodes.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: July 10, 2001
    Assignee: Nortel Networks Limited
    Inventors: Evert de Boer, Peter William Phelps, Louis Rene Pare, David Charles Steele, Stephen Wilson
  • Patent number: 5982455
    Abstract: An image processing system 20 comprises a format converter 21 for receiving a first signal having a larger bandwidth and a second signal having a smaller bandwidth, the first and second signals together representing an image. A processor 23 is arranged to process the first and second signals to produce signals representing a manipulated version of the image. The system further comprises a deriving circuit 25 which is arranged to derive from information in the larger bandwidth signal additional information for the smaller bandwidth signal. The deriving circuit derives an unknown value of a pixel as represented by the smaller bandwidth signal from known values of the pixel and the pixels adjacent thereto as represented by the larger bandwidth signal and from known values of the adjacent pixels as represented by the smaller bandwidth signal. The deriving circuit facilitates conversion of the first and second signals into another signal format representing the image.
    Type: Grant
    Filed: April 10, 1997
    Date of Patent: November 9, 1999
    Assignee: Quantel Limited
    Inventors: David Charles Steele, David Throup