Abstract: The present invention includes a system that has been developed to vary the starting and stopping of a pulse train of arbitrary phase without glitches, spurious pulses, or spurious change in duty cycle. This is accomplished by a system for generating a gated periodic waveform, the system includes a generator for generating a periodic waveform of adjustable phase; a device for providing a delayed enable signal based on the phase of the periodic waveform so that the gated periodic waveform can be started and stopped without creating undesirable changes in the gated periodic waveform; and a logic element for generating a gated periodic waveform based on the delayed enable signal and the periodic waveform of adjustable phase.

Abstract: The present invention includes a system that has been developed to vary the starting and stopping of a pulse train of arbitrary phase without glitches, spurious pulses, or spurious change in duty cycle. This is accomplished by a system for generating a gated periodic waveform, the system includes a generator for generating a periodic waveform of adjustable phase; a device for providing a delayed enable signal based on the phase of the periodic waveform so that the gated periodic waveform can be started and stopped without creating undesirable changes in the gated periodic waveform; and a logic element for generating a gated periodic waveform based on the delayed enable signal and the periodic waveform of adjustable phase.

Abstract: A clock generator for providing programmable control of an output clock, the clock generator includes a mechanism for creating a plurality of clocks offset in phase; two programmable selectors for selecting two clocks from the plurality of clocks; and logic for combining the two selected clocks to create an output clock with any combination of offset, if any, and width.

Abstract: A timing generator for controlling an image sensor, the timing generator includes a first output driver that is continuously supplying a current to an output; a second output driver that is connected in parallel with the first output driver and that is selectively energized for supplying an additional current to the output; a controller that is electrically connected to the second driver which, based on the resulting waveform at the output, is adjusted to either supply its current or not supply its current for varying a total current to the output to control an image sensor.

Abstract: A bus interface device for an application specific integrated circuit handles more than two different clock frequencies and allow for real time switching between the clock frequencies by subsystems of the application specific integrated circuit. In a preferred embodiment, a master state machine is provided that includes a plurality of control input lines and a plurality of control output lines, and a plurality of synchronizing state machines each coupled to one of the control output lines of the master state machine and to a separate clock frequency line. The master state machine, based on signals applied to the control input lines, selectively enables the synchronizing state machines to supply the different clock frequencies to the subsystems of the application specific integrated circuit.