Patents by Inventor David Chazan
David Chazan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7351377Abstract: Methods and devices that include the use of venting elements for enhancing bonded substrate yields and regulating temperature. Venting elements are generally fabricated proximal to functionalized regions in substrate surfaces to prevent bond voids that form during bonding processes from affecting the functionalized regions. Venting elements generally include venting channels or networks of channels and/or venting cavities.Type: GrantFiled: June 18, 2001Date of Patent: April 1, 2008Assignee: Caliper Life Sciences, Inc.Inventors: David Chazan, Luc J. Bousse, Carlton Brooks, Derek Louch, Michael R. Spaid
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Publication number: 20070261472Abstract: The present invention is a disposable sensor for use with a device that quantifies analytes in a gaseous sample. It comprises (i) a sensing element, (ii) a means for interfacing the disposable sensor with a gas analysis device, and (iii) a housing. When used with a device that can quantify the concentration of an analyte in a gas sample, the present invention facilitates the use of exhaled breath analysis as a clinical tool.Type: ApplicationFiled: April 19, 2007Publication date: November 15, 2007Applicant: Apieron, Inc.Inventors: Bryan Flaherty, Bhairavi Parikh, Kevin Nason, David Chazan, Jonathan Fay, John Kaiser, James Stone
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Patent number: 7220387Abstract: The present invention is a disposable sensor for use with a device that quantifies analytes in a gaseous sample. It comprises (i) a sensing element, (ii) a means for interfacing the disposable sensor with a gas analysis device, and (iii) a housing. When used with a device that can quantify the concentration of an analyte in a gas sample, the present invention facilitates the use of exhaled breath analysis as a clinical tool.Type: GrantFiled: January 28, 2004Date of Patent: May 22, 2007Assignee: Apieron Biosystems Corp.Inventors: Bryan Flaherty, Bhairavi Parikh, Kevin Nason, David Chazan, Johnathan Fay, John Kaiser, James Stone
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Publication number: 20070086920Abstract: Highly sensitive devices for detecting nitric oxide and/or other gaseous analytes in gaseous samples are improved by the incorporation of a carbon monoxide scavenger in the interior of the device or in the device packaging. The release of carbon monoxide within the housing of the device by the plastic used in the construction of the housing or by anything within the device that releases carbon monoxide causes a loss in sensitivity due to competition between the carbon monoxide and the nitric oxide for the binding sites on the device sensor. The scavenger corrects this by either catalyzing the oxidation of carbon monoxide to the less competitive carbon dioxide or immobilizing the carbon monoxide by affinity-type or covalent binding. Analogous effects are achieved for analytes other than nitric oxide but that likewise encounter interference from carbon monoxide in binding to sensors.Type: ApplicationFiled: October 14, 2005Publication date: April 19, 2007Applicant: Aperon Biosystems Corp.Inventors: David Anvar, David Chazan, Bryan Flaherty, Bhairavi Parikh
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Publication number: 20060191321Abstract: The degradation over time that is commonly seen with analyte-binding proteins when used as sensors for trace amounts of an analyte in a gaseous mixture is reduced by maintaining the sensor in a low-oxygen or oxygen-free environment.Type: ApplicationFiled: February 6, 2006Publication date: August 31, 2006Applicant: APERON BIOSYSTEMS CORP., a corporation of the state of CaliforniaInventors: David Chazan, David Anvar, Autumn Talbott
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Publication number: 20060174691Abstract: A method of avoiding or delaying degradation of a transduction molecule in a trace gas sensor by controlling oxygen exposure is disclosed. Degradation of the gas sensor can be avoided by storage of the sensor in a low-oxygen or substantially oxygen-free environment.Type: ApplicationFiled: February 7, 2005Publication date: August 10, 2006Inventors: David Chazan, David Anvar, Autumn Talbott
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Publication number: 20060177889Abstract: A gas analysis sensing element and a method of making the sensing element is disclosed. In one embodiment, the sensing element includes cytochrome-c embedded in a sol-gel matrix. The sol-gel matrix may take the form of a thin film or a monolith. The applicants have discovered a number of parameters for creating such a sensing element, including protein concentration, sol-gel pore size, surface area for the monolith embodiment, sol-gel components, and work-up temperature.Type: ApplicationFiled: February 5, 2005Publication date: August 10, 2006Inventors: David Anvar, David Chazan, Bhairavi Parikh, Bryan Flaherty, Jonathan Fay
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Publication number: 20060177890Abstract: A gas analysis sensing element and a method of making the sensing element are disclosed. In one embodiment, the sensing element includes cytochrome c embedded in a sol-gel matrix. The sol-gel matrix is either a thin film or a monolith. Parameters for creating such a sensing element, including protein concentration, sol-gel pore size, surface area for the monolith embodiment, sol-gel components, and processing temperature, are also disclosed.Type: ApplicationFiled: January 30, 2006Publication date: August 10, 2006Applicant: APERON BIOSYSTEMS CORP., a corporation of the state of CaliforniaInventors: David Anvar, Bhairavi Parikh, Jonathan Fay, David Chazan
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Patent number: 7069952Abstract: The present invention provides multi-layered microfluidic devices comprising an interface layer between every two substrate layers. The interface layer simplifies the manufacturing process of the multi-layered devices because the interface may comprise a material suitable for etching whereby manufacturing of these devices is simplified to a great extent. The invention also provides methods of manufacturing the multi-layered devices wherein the devices may comprise substrates composed of non-similar materials that are bonded together by anodic bonding.Type: GrantFiled: November 12, 2002Date of Patent: July 4, 2006Assignee: Caliper Life Sciences, Inc.Inventors: Richard J. McReynolds, David Chazan
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Publication number: 20050266582Abstract: A microfluidic system for performing chemical reactions or biochemical, biological, or chemical assays utilizing a microfabricated device or “chip.” The system may include, among others, an integrated membrane fabricated from a chemically inert material whose permeability for gases, liquids, cells, and specific molecules, etc. can be selected for optimum results in a desired application.Type: ApplicationFiled: April 14, 2005Publication date: December 1, 2005Inventors: Douglas Modlin, David Chazan
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Publication number: 20050083527Abstract: The present invention is a disposable sensor for use with a device that quantifies analytes in a gaseous sample. It comprises (i) a sensing element, (ii) a means for interfacing the disposable sensor with a gas analysis device, and (iii) a housing. When used with a device that can quantify the concentration of an analyte in a gas sample, the present invention facilitates the use of exhaled breath analysis as a clinical tool.Type: ApplicationFiled: January 28, 2004Publication date: April 21, 2005Inventors: Bryan Flaherty, Bhairavi Parikh, Kevin Nason, David Chazan, Jonathan Fay, John Kaiser, James Stone
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Patent number: 6756019Abstract: The present invention provides microfluidic devices that comprise a body structure comprising at least a first microscale channel network disposed therein. The body structure has a plurality of ports disposed in the body structure, where each port is in fluid communication with one or more channels in the first channel network. The devices also include a cover layer comprising a plurality of apertures disposed through the cover layer. The cover layer is mated with the body structure whereby each of the apertures is aligned with a separate one of the plurality of ports. Rings are optionally disposed between the cover layer and the body structure and circumferentially around pairs of aligned apertures and ports. The devices also optionally include conductive coatings and membranes. The invention additionally provides methods of controlling the delivery of a composition of material into a microfluidic device.Type: GrantFiled: April 6, 2000Date of Patent: June 29, 2004Assignee: Caliper Technologies Corp.Inventors: Robert S. Dubrow, Colin B. Kennedy, Robert Nagle, David Chazan, Ernest C. W. Lee, Khushroo Gandhi, Calvin Y. H. Chow
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Patent number: 6752966Abstract: Microfabrication methods and devices in which microscale structural elements are provided in an intermediate polymer layer between two planar substrates. Preferred aspects utilize photoimagable or ablatable polymer layers as the intermediate polymer layer.Type: GrantFiled: September 1, 2000Date of Patent: June 22, 2004Assignee: Caliper Life Sciences, Inc.Inventor: David Chazan
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Patent number: 6635487Abstract: A test device for use as a fluorescent standard in microfluidic analytical detection systems includes one or more slits that correspond to, and are of similar dimension to, one or more microchannels in a detection region on a corresponding analysis chip. A fluorescent material is attached to the test device on the side opposite the illumination source such that excitation radiation passes through the slit(s), which defines the focal plane of the illumination optics, and impinges on the fluorescent material thereby causing the fluorescent material to fluoresce. By displacing the fluorescent material relative to the focal plane, the intensity of the radiation exciting the fluorescent material is dispersed relative to the intensity of the radiation at the focal plane, and concomitantly the strength of the resulting fluorescent signal is reduced.Type: GrantFiled: May 7, 2001Date of Patent: October 21, 2003Assignee: Caliper Technologies Corp.Inventors: Ernest C. W. Lee, Robert Nagle, Richard J. McReynolds, David Chazan, Robert S. Dubrow
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Patent number: 6509529Abstract: A wiring substrate with reduced thermal expansion stress. A wiring substrate, such as a laminated PWB, thin film circuit, lead frame, or chip carrier accepts an integrated circuit, such as a die, a flip chip, or ball grid array package. The wiring substrate has a thermal expansion stress reduction insert, void, or constructive void in a thermal expansion stress region proximate to the integrated circuit. The thermal expansion stress reduction insert or void may extend a selected distance from the edge or edges of the integrated circuit attachment area. The thermal expansion stress reduction insert or void improves the flexibility of the wiring substrate in the region that is joined to the integrated circuit, thus reducing thermal stress between components of the wiring substrate-integrated circuit assembly. In another embodiment, layers of a laminated wiring substrate are intentionally not bonded beneath the chip attach area, thus allowing greater flexibility of the upper layer of the laminate.Type: GrantFiled: September 20, 2001Date of Patent: January 21, 2003Assignee: Kulicke & Soffa Holdings, Inc.Inventors: Sundar Kamath, David Chazan, Jan I. Strandberg, Solomon I. Beilin
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Publication number: 20020025280Abstract: Methods and devices that include the use of venting elements for enhancing bonded substrate yields and regulating temperature. Venting elements are generally fabricated proximal to functionalized regions in substrate surfaces to prevent bond voids that form during bonding processes from affecting the functionalized regions. Venting elements generally include venting channels or networks of channels and/or venting cavities.Type: ApplicationFiled: June 18, 2001Publication date: February 28, 2002Inventors: David Chazan, Luc J. Bousse, Carlton Brooks, Derek Louch, Michael R. Spaid
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Publication number: 20020011353Abstract: A wiring substrate with reduced thermal expansion stress. A wiring substrate, such as a laminated PWB, thin film circuit, lead frame, or chip carrier accepts an integrated circuit, such as a die, a flip chip, or ball grid array package. The wiring substrate has a thermal expansion stress reduction insert, void, or constructive void in a thermal expansion stress region proximate to the integrated circuit. The thermal expansion stress reduction insert or void may extend a selected distance from the edge or edges of the integrated circuit attachment area. The thermal expansion stress reduction insert or void improves the flexibility of the wiring substrate in the region that is joined to the integrated circuit, thus reducing thermal stress between components of the wiring substrate-integrated circuit assembly. In another embodiment, layers of a laminated wiring substrate are intentionally not bonded beneath the chip attach area, thus allowing greater flexibility of the upper layer of the laminate.Type: ApplicationFiled: September 20, 2001Publication date: January 31, 2002Inventors: Sundar Kamath, David Chazan, Jan I. Strandberg, Solomon I. Beilin
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Patent number: 6317331Abstract: A wiring substrate with reduced thermal expansion. A wiring substrate, such as a laminated PWB, thin film circuit, lead frame, or chip carrier accepts an integrated circuit, such as a die, a flip chip, or a BGA package. The wiring substrate has a thermal expansion reduction insert in a thermal expansion stress region where the integrated circuit is mounted. The thermal expansion reduction insert may extend a selected distance from the edge or edges of the integrated circuit attachment area, or stop a selected distance from the edge or edges of the integrated circuit attachment area, or be essentially equal to the integrated circuit attachment area. The thermal expansion reduction insert reduces the thermal expansion of the wiring substrate in the region that is joined to the integrated circuit, thus reducing thermal stress between components of the wiring substrate-integrated circuit assembly.Type: GrantFiled: August 16, 1999Date of Patent: November 13, 2001Assignee: Kulicke & Soffa Holdings, Inc.Inventors: Sundar Kamath, David Chazan, Solomon I. Beilin
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Patent number: 6299053Abstract: A wiring substrate with reduced thermal expansion stress. A wiring substrate, such as a laminated PWB, thin film circuit, lead frame, or chip carrier accepts an integrated circuit, such as a die, a flip chip, or ball grid array package. The wiring substrate has a thermal expansion stress reduction insert, void, or constructive void in a thermal expansion stress region proximate to the integrated circuit. The thermal expansion stress reduction insert or void may extend a selected distance from the edge or edges of the integrated circuit attachment area. The thermal expansion stress reduction insert or void improves the flexibility of the wiring substrate in the region that is joined to the integrated circuit, thus reducing thermal stress between components of the wiring substrate-integrated circuit assembly. In another embodiment, layers of a laminated wiring substrate are intentionally not bonded beneath the chip attach area, thus allowing greater flexibility of the upper layer of the laminate.Type: GrantFiled: August 16, 1999Date of Patent: October 9, 2001Assignee: Kulicke & Soffa Holdings, Inc.Inventors: Sundar Kamath, David Chazan, Jan I. Strandberg, Solomon I. Beilin
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Patent number: 4801785Abstract: Improvements to electrical devices comprising conductive polymer compositions are described. The device, preferably a heater, comprises two electrodes, preferably planar electrodes and a conductive polymer composition, which preferably exhibits PTC behavior, and which is preferably sandwiched between the electrodes. At least one of the electrodes comprises a metal with a thin layer of high resistivity material attached thereto, e.g. anodized aluminum, so that the layer separates the electrode and the conductive polymer composition. This raises the room temperature resistance of the device and thus reduces the in-rush current.Type: GrantFiled: January 14, 1986Date of Patent: January 31, 1989Assignee: Raychem CorporationInventors: Chi-Ming Chan, Pradeep Barma, David Chazan, David Liu