Abstract: A method for managing data transfer for a plurality of processors. Transfer messages exchanged between processor units and an external node in an integrity manager located in hardware in communication with the processor units and the external node are received. An exchange of the transfer messages is managed by the processor units with the external node based on a selected mode in mixed integrity modes such that redundantly calculated outputs from the processor units in a high integrity mode match.

Abstract: A method for synchronizing processor units. An external synchronizer is communicated with to determine whether an undesired amount of skew is present between a first processor unit and a second processor unit in communication with a synchronization system. The first processor unit is selectively directed to perform an action without generating a needed result such that the undesired amount of skew between the first processor unit and the second processor unit is reduced when the undesired amount of skew is present in the first processor unit. The first processor unit and the second processor unit are associated with each other for a high integrity mode in which integrity checks are performed on corresponding messages generated by the first processor unit and the second processor unit.

Abstract: A method for managing data transfer for a plurality of processors. Transfer messages exchanged between processor units and an external node in an integrity manager located in hardware in communication with the processor units and the external node are received. An exchange of the transfer messages is managed by the processor units with the external node based on a selected mode in mixed integrity modes such that redundantly calculated outputs from the processor units in a high integrity mode match.

Abstract: A method for synchronizing processor units. An external synchronizer is communicated with to determine whether an undesired amount of skew is present between a first processor unit and a second processor unit in communication with a synchronization system. The first processor unit is selectively directed to perform an action without generating a needed result such that the undesired amount of skew between the first processor unit and the second processor unit is reduced when the undesired amount of skew is present in the first processor unit. The first processor unit and the second processor unit are associated with each other for a high integrity mode in which integrity checks are performed on corresponding messages generated by the first processor unit and the second processor unit.

Abstract: A method for establishing a full end-to-end functionality chain of collaborating network accessible capabilities within a network centric environment is described. The method includes identifying the network accessible capabilities that are necessary to implement the end-to-end functionality chain, receiving data relating to which capabilities are available at each network node, determining if all necessary capabilities are available based on received responses to the data request, selecting one or more network accessible capability instances for each necessary network accessible capability, and executing the selected capability instances in an order that implements the end-to-end functionality chain.

Abstract: A method for establishing a full end-to-end functionality chain of collaborating network accessible capabilities within a network centric environment is described. The method includes identifying the network accessible capabilities that are necessary to implement the end-to-end functionality chain, receiving data relating to which capabilities are available at each network node, determining if all necessary capabilities are available based on received responses to the data request, selecting one or more network accessible capability instances for each necessary network accessible capability, and executing the selected capability instances in an order that implements the end-to-end functionality chain.