Patents by Inventor David CORIAT

David CORIAT has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10923191
    Abstract: A 3D microelectronic device is provided with several superimposed layers of components, with an upper layer including one or several memory cells having a SRAM structure and provided with a rear biasing electrode. The biasing of the rear biasing electrode is modified to switch the memory cells from a ROM operating mode to a SRAM operating mode.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: February 16, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: David Coriat, Adam Makosiej
  • Patent number: 10861520
    Abstract: Memory device provided with a set of memory cells having a first inverter and a second inverter each connected to a supply line from a first supply line and a second supply line, the memory device being provided with a circuit element configured for: during a start-up phase consecutive to a powering on, applying a first pair of potentials, respectively to the first supply line and the second supply line, in order to pre-load a logic data to some cells depending on the manner in which said cells are respectively connected to said supply lines, then during a second phase, applying a second pair of potentials respectively to said first supply line and the second supply line, so as to symmetrically supply the inverters of each cell.
    Type: Grant
    Filed: July 12, 2019
    Date of Patent: December 8, 2020
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Adam Makosiej, David Coriat
  • Publication number: 20200035302
    Abstract: 3D microelectronic device provided with several superimposed layers of components with an upper layer comprising one or several memory cells having a SRAM structure and provided with a rear biasing electrode of which the biasing is modified to switch the cells from a ROM mode operating mode to a SRAM mode operating mode (FIG. 2).
    Type: Application
    Filed: July 12, 2019
    Publication date: January 30, 2020
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: David CORIAT, Adam MAKOSIEJ
  • Publication number: 20200020373
    Abstract: Memory device provided with a set of memory cells having a first inverter and a second inverter each connected to a supply line from a first supply line and a second supply line, the memory device being provided with a circuit element configured for: during a start-up phase consecutive to a powering on, applying a first pair of potentials, respectively to the first supply line and the second supply line, in order to pre-load a logic data to some cells depending on the manner in which said cells are respectively connected to said supply lines, then during a second phase, applying a second pair of potentials respectively to said first supply line and the second supply line, so as to symmetrically supply the inverters of each cell.
    Type: Application
    Filed: July 12, 2019
    Publication date: January 16, 2020
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Adam MAKOSIEJ, David CORIAT