Patents by Inventor David CUI
David CUI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9659791Abstract: Methods are described for etching metal layers that are difficult to volatize, such as cobalt, nickel, and platinum to form an etched metal layer with reduced surface roughness. The methods include pretreating the metal layer with a local plasma formed from a hydrogen-containing precursor. The pretreated metal layer is then reacted with a halogen-containing precursor to form a halogenated metal layer having a halogenated etch product. A carbon-and-nitrogen-containing precursor reacts with the halogenated etch product to form a volatile etch product that can be removed in the gas phase from the etched surface of the metal layer. The surface roughness may be reduced by performing one or more plasma treatments on the etching metal layer after a plurality of etching sequences. Surface roughness is also reduced by controlling the temperature and length of time the metal layer is reacting with the etchant precursors.Type: GrantFiled: July 16, 2015Date of Patent: May 23, 2017Assignee: Applied Materials, Inc.Inventors: Xikun Wang, David Cui, Anchuan Wang, Nitin K. Ingle
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Publication number: 20170018439Abstract: Methods are described for etching metal layers that are difficult to volatize, such as cobalt, nickel, and platinum to form an etched metal layer with reduced surface roughness. The methods include pretreating the metal layer with a local plasma formed from a hydrogen-containing precursor. The pretreated metal layer is then reacted with a halogen-containing precursor to form a halogenated metal layer having a halogenated etch product. A carbon-and-nitrogen-containing precursor reacts with the halogenated etch product to form a volatile etch product that can be removed in the gas phase from the etched surface of the metal layer. The surface roughness may be reduced by performing one or more plasma treatments on the etching metal layer after a plurality of etching sequences. Surface roughness is also reduced by controlling the temperature and length of time the metal layer is reacting with the etchant precursors.Type: ApplicationFiled: July 16, 2015Publication date: January 19, 2017Applicant: Applied Materials, Inc.Inventors: Xikun Wang, David Cui, Anchuan Wang, Nitin K. Ingle
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Publication number: 20150346961Abstract: Provided herein are a method, apparatus and computer program product for providing a recommendation for an application in response to determining that an application that was initiated was not an intended application. In particular, methods may include receiving a first input corresponding to the initiation of a first application, initiating the first application in response to receiving the first input, receiving an indication of a closure of the first application, and determining that the closure of the first application occurred meeting one or more predetermined conditions. The method may cause a recommendation to be provided of at least a second application in response to determining that the closure of the first application occurred meeting one or more predetermined conditions.Type: ApplicationFiled: December 24, 2012Publication date: December 3, 2015Inventors: David CUI, Herrick SHEN, Song LIU, Christian KRAFT, Zhuoyuan LIAO
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Patent number: 8563095Abstract: A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.Type: GrantFiled: March 15, 2010Date of Patent: October 22, 2013Assignee: Applied Materials, Inc.Inventors: Nagarajan Rajagopalan, Xinhai Han, Ryan Yamase, Ji Ae Park, Shamik Patel, Thomas Nowak, Zhengjiang “David” Cui, Mehul Naik, Heung Lak Park, Ran Ding, Bok Hoen Kim
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Publication number: 20110223765Abstract: A method of forming a passivation layer comprising silicon nitride on features of a substrate is described. In a first stage of the deposition method, a dielectric deposition gas, comprising a silicon-containing gas and a nitrogen-containing gas, is introduced into the process zone and energized to deposit a silicon nitride layer. In a second stage, a treatment gas, having a different composition than that of the dielectric deposition gas, is introduced into the process zone and energized to treat the silicon nitride layer. The first and second stages can be performed a plurality of times.Type: ApplicationFiled: March 15, 2010Publication date: September 15, 2011Applicant: APPLIED MATERIALS, INC.Inventors: Nagarajan RAJAGOPALAN, Xinhai HAN, Ryan YAMASE, Ji Ae PARK, Shamik PATEL, Thomas NOWAK, Zhengjiang "David" CUI, Mehul NAIK, Heung Lak PARK, Ran DING, Bok Hoen KIM
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Publication number: 20110104891Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.Type: ApplicationFiled: January 7, 2011Publication date: May 5, 2011Inventors: AMIR AL-BAYATI, Alexandros T. Demos, Kang Sub Yim, Mehul Naik, Zhenjiang David Cui, Mihaela Balseanu, Meiyee Maggie Le Shek, Li-Qun Xia
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Patent number: 7879683Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.Type: GrantFiled: October 9, 2007Date of Patent: February 1, 2011Assignee: Applied Materials, Inc.Inventors: Amir Al-Bayati, Alexandros T. Demos, Kang Sub Yim, Mehul Naik, Zhenjiang “David” Cui, Mihaela Balseanu, Meiyee (Maggie Le) Shek, Li-Qun Xia
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Publication number: 20090093112Abstract: A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches.Type: ApplicationFiled: October 9, 2007Publication date: April 9, 2009Inventors: AMIR AL-BAYATI, Alexandros T. Demos, Kang Sub Yim, Mehul Naik, Zhenjiang 'David' Cui, Mihaela Balseanu, Meiyee (Maggie Le) Shek, Li-Qun Xia
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Patent number: 7189658Abstract: A method of processing a substrate including depositing a transition layer and a dielectric layer on a substrate in a processing chamber are provided. The transition layer is deposited from a processing gas including an organosilicon compound and an oxidizing gas. The flow rate of the organosilicon compound is ramped up during the deposition of the transition layer such that the transition layer has a carbon concentration gradient and an oxygen concentration gradient. The transition layer improves the adhesion of the dielectric layer to an underlying barrier layer on the substrate.Type: GrantFiled: May 4, 2005Date of Patent: March 13, 2007Assignee: Applied Materials, Inc.Inventors: Annamalai Lakshmanan, Deenesh Padhi, Ganesh Balasubramanian, Zhenjiang David Cui, Daemian Raj, Juan Carlos Rocha-Alvarez, Francimar Schmitt, Bok Hoen Kim