Patents by Inventor David D. Colby

David D. Colby has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6720788
    Abstract: The present invention provides a system and method for high resolution current measurements of an integrated circuit (13). With the present invention, no DFT circuits are required. Leakage current characterizing an integrated circuit is determined for at least one logic state of the integrated circuit from a sum of a first and second current measurement. A voltage source (15) and a current source (17) are used at different settings for each measurement and the measurements are summed for evaluation with an expected value.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: April 13, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: David D. Colby, Dale A. Heaton
  • Publication number: 20040021478
    Abstract: The present invention provides a system and method for high resolution current measurements of an integrated circuit (13). With the present invention, no DFT circuits are required. Leakage current characterizing an integrated circuit is determined for at least one logic state of the integrated circuit from a sum of a first and second current measurement. A voltage source (15) and a current source (17) are used at different settings for each measurement and the measurements are summed for evaluation with an expected value.
    Type: Application
    Filed: August 5, 2002
    Publication date: February 5, 2004
    Inventors: David D. Colby, Dale A. Heaton
  • Patent number: 6622271
    Abstract: A testing system for testing an integrated circuit device includes a test definition generator program which generates an initial test definition from information that includes test data. A checker program checks the initial test definition for compatibility with each of at least two different testers. Each of the testers includes a hardware interface, native software having driver routines for the associated hardware interface, and a compiler compatible with the driver routines. Each tester includes a converter program which has been compiled by a compiler other than the native compiler, and which converts the initial test definition into a modified test definition. The modified test definition is interpreted by an interpreter program, which has been compiled by the native compiler, and which controls the hardware interface through the native driver routines so as to carry out the test definition.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: September 16, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: David D. Colby, Sowrirajan Balajee, Barton Gregg Wilder, Ansell W. Outlaw
  • Patent number: 6591205
    Abstract: A method of waveform generation using a VLSI digital tester unit without an arbitrary waveform generator. A software application produces a series of vectors to drive a digital tester unit from a set of datapoints which defines a waveform needed in the test program. The set of datapoints can be generated in a test simulator such as SPICE or can be generated by digitizing the arbitrary waveform needed in a test program. The vectors describe the number of resistors of a pseudo arbitrary waveform generator (PAWG) circuit to be driven high in order to reproduce the desired waveform for input into the device under test. The software also determines the resolution, e.g., 5 ns, of the waveform.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: July 8, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: David D. Colby