Patents by Inventor David D. Sanner

David D. Sanner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11165766
    Abstract: A method and computer system for implementing authentication protocol for merging multiple server nodes with trusted platform modules (TPMs) utilizing provisioned node certificates to support concurrent node add and node remove. Each of the multiple server nodes boots an instance of enablement level firmware and extended to a trusted platform module (TPM) on each node as the server nodes are powered up. A hardware secure channel is established between the server nodes for firmware message passing as part of physical configuration of the server nodes to be merged. A shared secret is securely exchanged via the hardware secure channel between the server nodes establishing an initial authentication value shared among all server nodes. All server nodes confirm common security configuration settings and exchange TPM log and platform configuration register (PCR) data to establish common history for future attestation requirements, enabling dynamic changing the server nodes and concurrently adding and removing nodes.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: November 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Timothy R. Block, Elaine R. Palmer, Kenneth A. Goldman, William E. Hall, Hugo M. Krawczyk, David D. Sanner, Christopher J. Engel, Peter A. Sandon, Alwood P. Williams, III
  • Publication number: 20200067912
    Abstract: A method and computer system for implementing authentication protocol for merging multiple server nodes with trusted platform modules (TPMs) utilizing provisioned node certificates to support concurrent node add and node remove. Each of the multiple server nodes boots an instance of enablement level firmware and extended to a trusted platform module (TPM) on each node as the server nodes are powered up. A hardware secure channel is established between the server nodes for firmware message passing as part of physical configuration of the server nodes to be merged. A shared secret is securely exchanged via the hardware secure channel between the server nodes establishing an initial authentication value shared among all server nodes. All server nodes confirm common security configuration settings and exchange TPM log and platform configuration register (PCR) data to establish common history for future attestation requirements, enabling dynamic changing the server nodes and concurrently adding and removing nodes.
    Type: Application
    Filed: August 21, 2018
    Publication date: February 27, 2020
    Inventors: Timothy R. Block, Elaine R. Palmer, Kenneth A. Goldman, William E. Hall, Hugo M. Krawczyk, David D. Sanner, Christopher J. Engel, Peter A. Sandon, Alwood P. Williams, III
  • Patent number: 9262177
    Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Patent number: 9250921
    Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: February 2, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Patent number: 9021483
    Abstract: Performance in object-oriented systems may be improved by allowing multiple concurrent hardware control and diagnostic operations to run concurrently on the system while preventing race conditions, state/data corruption, and hangs due to deadlock conditions. Deadlock prevention rules may be employed to grant or deny request for hardware operation locks, hardware communication locks, and/or data locks.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Crowell, Alan Hlava, Christopher T. Phan, David D. Sanner
  • Publication number: 20140173250
    Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Publication number: 20140173251
    Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.
    Type: Application
    Filed: January 9, 2014
    Publication date: June 19, 2014
    Applicant: International Business Machines Corporation
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Patent number: 8650431
    Abstract: A method, system, and computer program product for changing hardware in a data processing system without disrupting processes executing on the data processing system. A hardware change to a selected portion of hardware in the data processing system may be required, such as to repair hardware errors or to implement a system update. Responsive to a determination that a hardware change to the selected portion of the hardware is required, a process being performed by the selected portion is moved from the selected portion of the hardware to an alternate portion of the hardware. The hardware change is applied to the selected portion of the hardware. The selected portion of the hardware is returned for use by the data processing system after the hardware change is applied.
    Type: Grant
    Filed: August 24, 2010
    Date of Patent: February 11, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael S. Floyd, Ryan J. Pennington, Harmony L. Prince, Kevin F. Reick, David D. Sanner
  • Patent number: 8578219
    Abstract: A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: November 5, 2013
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Crowell, David D. Sanner, Thi N. Tran
  • Patent number: 8495430
    Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Publication number: 20120239989
    Abstract: A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution.
    Type: Application
    Filed: March 14, 2011
    Publication date: September 20, 2012
    Applicant: International Business Machines Corporation
    Inventors: Daniel M. Crowell, David D. Sanner, Thi N. Tran
  • Publication number: 20120054544
    Abstract: A method, system, and computer program product for changing hardware in a data processing system without disrupting processes executing on the data processing system. A hardware change to a selected portion of hardware in the data processing system may be required, such as to repair hardware errors or to implement a system update. Responsive to a determination that a hardware change to the selected portion of the hardware is required, a process being performed by the selected portion is moved from the selected portion of the hardware to an alternate portion of the hardware. The hardware change is applied to the selected portion of the hardware. The selected portion of the hardware is returned for use by the data processing system after the hardware change is applied.
    Type: Application
    Filed: August 24, 2010
    Publication date: March 1, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael S. Floyd, Ryan J. Pennington, Harmony L. Prince, Kevin F. Reick, David D. Sanner
  • Publication number: 20110161739
    Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.
    Type: Application
    Filed: March 10, 2011
    Publication date: June 30, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Patent number: 7958402
    Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: June 7, 2011
    Assignee: International Business Machines Corporation
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran
  • Publication number: 20100275216
    Abstract: Performance in object-oriented systems may be improved by allowing multiple concurrent hardware control and diagnostic operations to run concurrently on the system while preventing race conditions, state/data corruption, and hangs due to deadlock conditions. Deadlock prevention rules may be employed to grant or deny request for hardware operation locks, hardware communication locks, and/or data locks.
    Type: Application
    Filed: April 27, 2009
    Publication date: October 28, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Daniel M. Crowell, Alan Hlava, Christopher T. Phan, David D. Sanner
  • Publication number: 20100077258
    Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.
    Type: Application
    Filed: September 22, 2008
    Publication date: March 25, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Van H. Lee, David D. Sanner, Thi N. Tran