Patents by Inventor David D. Sanner
David D. Sanner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11165766Abstract: A method and computer system for implementing authentication protocol for merging multiple server nodes with trusted platform modules (TPMs) utilizing provisioned node certificates to support concurrent node add and node remove. Each of the multiple server nodes boots an instance of enablement level firmware and extended to a trusted platform module (TPM) on each node as the server nodes are powered up. A hardware secure channel is established between the server nodes for firmware message passing as part of physical configuration of the server nodes to be merged. A shared secret is securely exchanged via the hardware secure channel between the server nodes establishing an initial authentication value shared among all server nodes. All server nodes confirm common security configuration settings and exchange TPM log and platform configuration register (PCR) data to establish common history for future attestation requirements, enabling dynamic changing the server nodes and concurrently adding and removing nodes.Type: GrantFiled: August 21, 2018Date of Patent: November 2, 2021Assignee: International Business Machines CorporationInventors: Timothy R. Block, Elaine R. Palmer, Kenneth A. Goldman, William E. Hall, Hugo M. Krawczyk, David D. Sanner, Christopher J. Engel, Peter A. Sandon, Alwood P. Williams, III
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Publication number: 20200067912Abstract: A method and computer system for implementing authentication protocol for merging multiple server nodes with trusted platform modules (TPMs) utilizing provisioned node certificates to support concurrent node add and node remove. Each of the multiple server nodes boots an instance of enablement level firmware and extended to a trusted platform module (TPM) on each node as the server nodes are powered up. A hardware secure channel is established between the server nodes for firmware message passing as part of physical configuration of the server nodes to be merged. A shared secret is securely exchanged via the hardware secure channel between the server nodes establishing an initial authentication value shared among all server nodes. All server nodes confirm common security configuration settings and exchange TPM log and platform configuration register (PCR) data to establish common history for future attestation requirements, enabling dynamic changing the server nodes and concurrently adding and removing nodes.Type: ApplicationFiled: August 21, 2018Publication date: February 27, 2020Inventors: Timothy R. Block, Elaine R. Palmer, Kenneth A. Goldman, William E. Hall, Hugo M. Krawczyk, David D. Sanner, Christopher J. Engel, Peter A. Sandon, Alwood P. Williams, III
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Patent number: 9262177Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.Type: GrantFiled: December 19, 2012Date of Patent: February 16, 2016Assignee: International Business Machines CorporationInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Patent number: 9250921Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.Type: GrantFiled: January 9, 2014Date of Patent: February 2, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Patent number: 9021483Abstract: Performance in object-oriented systems may be improved by allowing multiple concurrent hardware control and diagnostic operations to run concurrently on the system while preventing race conditions, state/data corruption, and hangs due to deadlock conditions. Deadlock prevention rules may be employed to grant or deny request for hardware operation locks, hardware communication locks, and/or data locks.Type: GrantFiled: April 27, 2009Date of Patent: April 28, 2015Assignee: International Business Machines CorporationInventors: Daniel M. Crowell, Alan Hlava, Christopher T. Phan, David D. Sanner
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Publication number: 20140173250Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.Type: ApplicationFiled: December 19, 2012Publication date: June 19, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Publication number: 20140173251Abstract: Embodiments of the present invention provide a method for initializing a plurality of processors of a multi-processor system by executing, at each respective processor of the plurality of processors, at least a portion of local initialization code stored on the respective processor. Receiving, at a designated processor of the plurality of processors, external initialization code stored in external memory, wherein the remainder of the plurality of processors do not have access to the external initialization code stored in external memory. Determining, the designated processor, send at least a portion of the external initialization code to a processor of the remainder of the plurality of processors.Type: ApplicationFiled: January 9, 2014Publication date: June 19, 2014Applicant: International Business Machines CorporationInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Patent number: 8650431Abstract: A method, system, and computer program product for changing hardware in a data processing system without disrupting processes executing on the data processing system. A hardware change to a selected portion of hardware in the data processing system may be required, such as to repair hardware errors or to implement a system update. Responsive to a determination that a hardware change to the selected portion of the hardware is required, a process being performed by the selected portion is moved from the selected portion of the hardware to an alternate portion of the hardware. The hardware change is applied to the selected portion of the hardware. The selected portion of the hardware is returned for use by the data processing system after the hardware change is applied.Type: GrantFiled: August 24, 2010Date of Patent: February 11, 2014Assignee: International Business Machines CorporationInventors: Michael S. Floyd, Ryan J. Pennington, Harmony L. Prince, Kevin F. Reick, David D. Sanner
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Patent number: 8578219Abstract: A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution.Type: GrantFiled: March 14, 2011Date of Patent: November 5, 2013Assignee: International Business Machines CorporationInventors: Daniel M. Crowell, David D. Sanner, Thi N. Tran
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Patent number: 8495430Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.Type: GrantFiled: March 10, 2011Date of Patent: July 23, 2013Assignee: International Business Machines CorporationInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Publication number: 20120239989Abstract: A mechanism is provided for monitoring and verifying a clock state of a chip that does not write out clock state information. Responsive to identifying an access to the chip, the access is scanned to identify a chip register and a clock domain that will be accessed. A determination is made as to whether a bit of a clock trust unit associated with the chip register and the clock domain indicates whether to trust a clock state associated with the bit in a logical clock state unit. Responsive to the bit of the clock trust unit indicating that the clock state associated with the bit in the logical clock state unit is trusted, the clock state from the logical clock state unit is identified. Responsive to the clock state matching the clock state required by the access, the access is forwarded to the chip for execution.Type: ApplicationFiled: March 14, 2011Publication date: September 20, 2012Applicant: International Business Machines CorporationInventors: Daniel M. Crowell, David D. Sanner, Thi N. Tran
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Publication number: 20120054544Abstract: A method, system, and computer program product for changing hardware in a data processing system without disrupting processes executing on the data processing system. A hardware change to a selected portion of hardware in the data processing system may be required, such as to repair hardware errors or to implement a system update. Responsive to a determination that a hardware change to the selected portion of the hardware is required, a process being performed by the selected portion is moved from the selected portion of the hardware to an alternate portion of the hardware. The hardware change is applied to the selected portion of the hardware. The selected portion of the hardware is returned for use by the data processing system after the hardware change is applied.Type: ApplicationFiled: August 24, 2010Publication date: March 1, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael S. Floyd, Ryan J. Pennington, Harmony L. Prince, Kevin F. Reick, David D. Sanner
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Publication number: 20110161739Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.Type: ApplicationFiled: March 10, 2011Publication date: June 30, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Patent number: 7958402Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.Type: GrantFiled: September 22, 2008Date of Patent: June 7, 2011Assignee: International Business Machines CorporationInventors: Van H. Lee, David D. Sanner, Thi N. Tran
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Publication number: 20100275216Abstract: Performance in object-oriented systems may be improved by allowing multiple concurrent hardware control and diagnostic operations to run concurrently on the system while preventing race conditions, state/data corruption, and hangs due to deadlock conditions. Deadlock prevention rules may be employed to grant or deny request for hardware operation locks, hardware communication locks, and/or data locks.Type: ApplicationFiled: April 27, 2009Publication date: October 28, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Daniel M. Crowell, Alan Hlava, Christopher T. Phan, David D. Sanner
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Publication number: 20100077258Abstract: Disclosed is a computer implemented method, computer program product, and apparatus for generating diagnostic data for a thread. A service processor may begin by executing the computer usable program code to allocate a first thread to a monitoring function. The service processor determines if a second thread is running, wherein the second thread is associated with an operation. The service processor obtains an object pointer from a list of running threads, wherein the object pointer references a time data structure associated with the second thread, the time data structure comprising a maximum running time interval and a check time. The service processor calculates the check time as a maximum running time interval added to an initially sampled timestamp. The service processor determines if a current time exceeds the check time. In addition, the service processor generates an error log, responsive to a determination that the current time exceeds the check time.Type: ApplicationFiled: September 22, 2008Publication date: March 25, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Van H. Lee, David D. Sanner, Thi N. Tran