Abstract: A system for dynamically controlling point-of-coherency or a point-of-serialization of shared data includes a plurality of processing engines grouped into a plurality of separate clusters and a shared communications path communicatively connecting each of the plurality of clusters to one another. Each respective cluster includes memory shared by the processing engines of the respective cluster, each unit of data in the memory being assigned to a single owner cluster responsible for maintaining an authoritative copy and a single manager cluster permanently responsible for assigning the owner cluster responsibility. Each respective cluster also includes a controller configured to receive data requests, track each of a manager status and an ownership status of the respective cluster, and control ownership status changes with respect to respective units of data based at least in part on the tracked ownership and manager statuses of the respective cluster.

Abstract: A system comprises one or more processor cores, including a management processor core that executes instructions to partition at least a portion of the one or more processor cores into one or more partitions. The system includes at least one distributed virtual memory (DVM) hub that obtains a first DVM message from a processor core; determines, based on a processor core identifier of the DVM message, one or more recipient processor cores for the first DVM message; and provides the first DVM message to the one or more recipient processor cores. The system includes one or more interrupt interposers that are each associated with a processor core and prevent an interrupt originating from the associated processor core from being provided to a processor core that is outside the partition of the associated processor core.

Abstract: The disclosure provides for improved systems and methods for operating a shared cache among multiple workloads that have different levels of priority. For example, a plurality of processor cores can have access to a shared system cache, and these processor cores can be configured to execute different workloads in parallel with one another. Moreover, some workloads may be designated as having a higher priority than other workloads, and the shared cache can be configured to maintain cached data in a manner that can allow data associated with higher priority workloads to remain within the shared cache for a longer period of time than data for lower priority workloads. In accordance with aspects of the disclosure, a shared cache may implement an altered least-recently-used (LRU) replacement policy in which cache lines of data are positioned within a replacement queue based on the priority level of the data that is being stored.

Abstract: A system comprises one or more processor cores, including a management processor core that executes instructions to partition at least a portion of the one or more processor cores into one or more partitions. The system includes at least one distributed virtual memory (DVM) hub that obtains a first DVM message from a processor core; determines, based on a processor core identifier of the DVM message, one or more recipient processor cores for the first DVM message; and provides the first DVM message to the one or more recipient processor cores. The system includes one or more interrupt interposers that are each associated with a processor core and prevent an interrupt originating from the associated processor core from being provided to a processor core that is outside the partition of the associated processor core.

Abstract: A system for hardware partitions for a cloud server includes one or more processor cores. A first processor core executes instructions to partition at least a portion of the one or more processor cores into one or more partitions. The system includes one or more distributed virtual memory (DVM) interposers, each DVM interposer including a respective partition identifier that identifies a partition. Each DVM interposer, responsive to receiving a DVM message that includes a partition identifier that differs from the partition identifier of the DVM interposer, performs a preventative action. The system includes one or more interrupt interposers. Each interrupt interposer is associated with a processor core of the one or more processor cores. Each interrupt interposer prevents a first interrupt originating from the associated processor core from being provided to a processor core that is outside the partition of the associated processor core.

Abstract: Aspects of the disclosed technology include techniques and mechanisms for dynamic snoop-filter allocation for large-scale memory coherent systems. A coherency manager on an interconnect manages a directory storing data that indicates a current state of each cache line stored within each caching agent on the interconnect and a number of caching agents that share a cache line. Based on receiving a request from a caching agent to access to a cache line, the coherency manager uses a capacity of the directory, such as the number of caching agents that share a cache line, to determine whether to change an operation mode of a memory from a first mode to a second mode.

Abstract: Aspects of the disclosed technology include techniques and mechanisms for using far memory telemetry for hot and cold page management. A processor within a telemetry system parses page access requests transmitted from a central processing unit (CPU) to a computing system. The processor parses the request to determine whether a directory contains a record for the requested page. Based on determining the directory does not store a record for the requested page and based on determining the directory is not at capacity, the processor generates a record and stores the record in the directory. The processor transmits a signal to the computing system to determine whether to perform one or more actions on the pages identified in the directory, such as move a page from a far memory device to a near memory device based on directory data indicating a number of access requests associated with each page.

Abstract: A system for dynamically controlling point-of-coherency or a point-of-serialization of shared data includes a plurality of processing engines grouped into a plurality of separate clusters and a shared communications path communicatively connecting each of the plurality of clusters to one another. Each respective cluster includes memory shared by the processing engines of the respective cluster, each unit of data in the memory being assigned to a single owner cluster responsible for maintaining an authoritative copy and a single manager cluster permanently responsible for assigning the owner cluster responsibility. Each respective cluster also includes a controller configured to receive data requests, track each of a manager status and an ownership status of the respective cluster, and control ownership status changes with respect to respective units of data based at least in part on the tracked ownership and manager statuses of the respective cluster.

Abstract: A system for dynamically controlling point-of-coherency or a point-of-serialization of shared data includes a plurality of processing engines grouped into a plurality of separate clusters and a shared communications path communicatively connecting each of the plurality of clusters to one another. Each respective cluster includes memory shared by the processing engines of the respective cluster, each unit of data in the memory being assigned to a single owner cluster responsible for maintaining an authoritative copy and a single manager cluster permanently responsible for assigning the owner cluster responsibility. Each respective cluster also includes a controller configured to receive data requests, track each of a manager status and an ownership status of the respective cluster, and control ownership status changes with respect to respective units of data based at least in part on the tracked ownership and manager statuses of the respective cluster.

Abstract: A system, a non-transitory computer readable media and a method for FIR filtering. The method may include obtaining a set of input samples; and concurrently applying a FIR filtering process on the set of input samples to provide a set of FIR filtered output samples. The latter may include calculating intermediate results that represent a first number of coefficient-input sample products, while calculating only some of the first number of coefficient-input sample products, wherein the calculating of the intermediate results is executed by using less than a first number of multipliers.

Abstract: A system for dynamically controlling point-of-coherency or a point-of-serialization of shared data includes a plurality of processing engines grouped into a plurality of separate clusters and a shared communications path communicatively connecting each of the plurality of clusters to one another. Each respective cluster includes memory shared by the processing engines of the respective cluster, each unit of data in the memory being assigned to a single owner cluster responsible for maintaining an authoritative copy and a single manager cluster permanently responsible for assigning the owner cluster responsibility. Each respective cluster also includes a controller configured to receive data requests, track each of a manager status and an ownership status of the respective cluster, and control ownership status changes with respect to respective units of data based at least in part on the tracked ownership and manager statuses of the respective cluster.

Abstract: It is an object of the disclosed technique to provide a novel method and system for shared concurrent access to a memory cell. In accordance with the disclosed technique, there is thus provided a system for shared concurrent access to a memory cell, which includes at least one shared memory cell, an evaluator and a plurality of processing agents coupled to the input of the evaluator. The evaluator is further coupled with the at least one memory cell. The evaluator is configured to evaluate an expression for performing multiple concurrent composite assignments on the at least one shared memory cell. The evaluator further allows each of the plurality of processing agents to perform concurrent composite assignments on the at least one shared memory cell. The composite assignments do not include a read operation of the at least one shared memory cell by the plurality of processing agents.

Abstract: A system, a non-transitory computer readable media and a method for FIR filtering. The method may include obtaining a set of input samples; and concurrently applying a FIR filtering process on the set of input samples to provide a set of FIR filtered output samples. The latter may include calculating intermediate results that represent a first number of coefficient-input sample products, while calculating only some of the first number of coefficient-input sample products, wherein the calculating of the intermediate results is executed by using less than a first number of multipliers.

Abstract: It is an object of the disclosed technique to provide a novel method and system for shared concurrent access to a memory cell. In accordance with the disclosed technique, there is thus provided a system for shared concurrent access to a memory cell, which includes at least one shared memory cell, an evaluator and a plurality of processing agents coupled to the input of the evaluator. The evaluator is further coupled with the at least one memory cell. The evaluator is configured to evaluate an expression for performing multiple concurrent composite assignments on the at least one shared memory cell. The evaluator further allows each of the plurality of processing agents to perform concurrent composite assignments on the at least one shared memory cell. The composite assignments do not include a read operation of the at least one shared memory cell by the plurality of processing agents.