Abstract: A system and computer program product provide processor initialization in different platform environments via a single code set. The system includes: in response to detecting a power-on operation of the processor, a microcontroller retrieving hardware procedures (HWP) framework code from a storage and triggering execution of the HWP framework code on the processor. The execution of the HWP framework code generates a HWP framework that comprises a plurality of application programming interfaces (APIs) which govern how all communication processes involving hardware procedures can be accomplished. The system further includes the microcontroller performing one or more initialization procedures by communicating one or more attribute data via the HWP framework to configure the processor for operation within a specific platform environment in which the processor is to be operated.

Abstract: A method provides processor initialization in different platform environments via a single code set. The method includes: in response to detecting a power-on operation of the processor, a microcontroller retrieving hardware procedures (HWP) framework code from a storage and triggering execution of the HWP framework code on the processor. The execution of the HWP framework code generates a HWP framework that comprises a plurality of application programming interfaces (APIs) which govern how all communication processes involving hardware procedures can be accomplished. The method further includes performing one or more initialization procedures by communicating one or more attribute data via the HWP framework to configure the processor for operation within a specific platform environment in which the processor is to be operated. The HWP framework includes standard interfaces and enables direct updates to hardware procedures without requiring a new flash code or a firmware patch.

Abstract: A method for initializing processor cores in a multiprocessor system. The method includes a microcontroller initializing a first processor utilizing a common initialization image for all processor cores within the first processor. The first processor detects and executes system firmware. All remaining processors are initialized utilizing the common initialization image. The executing firmware detects a system configuration of the multiprocessor system. A customized processor initialization image for each of the processor cores in the multiprocessor system is generated and stored to a storage device. The processor cores are triggered to enter a power save state in which all initialization settings of the processor cores are lost. In response to all the processor cores entering the power save state, the first processor core of the first processor is re-initialized using a first customized initialization image generated for the first processor core.

Abstract: A system and computer program product for initializing processor cores in a multiprocessor system. The system includes a microcontroller that initializes a first processor utilizing a common initialization image for all processor cores within the first processor. The first processor detects and executes system firmware. All remaining processors are initialized utilizing the common initialization image. The executing firmware detects a system configuration of the multiprocessor system. A customized processor initialization image for each of the processor cores in the multiprocessor system is generated and stored to a storage device. The processor cores are triggered to enter a power save state in which all initialization settings of the processor cores are lost. In response to all the processor cores entering the power save state, the first processor core of the first processor is re-initialized using a first customized initialization image generated for the first processor core.

Abstract: According to one embodiment of the present disclosure, hardware initialization code and error action information are retrieved from separate storage areas. The hardware initialization code includes code that initializes a device, and also includes placeholders corresponding to actions that are performed when the device fails initialization. Likewise, the error action information describes the actions that are performed when the device fails initialization. The error action information is converted into macros that include lines of code. As such, the error action placeholders are matched to the macros and, in turn, each of the error action placeholders is replaced with the lines of code corresponding to the matched macros.

Abstract: According to one embodiment of the present disclosure, hardware initialization code and error action information are retrieved from separate storage areas. The hardware initialization code includes code that initializes a device, and also includes placeholders corresponding to actions that are performed when the device fails initialization. Likewise, the error action information describes the actions that are performed when the device fails initialization. The error action information is converted into macros that include lines of code. As such, the error action placeholders are matched to the macros and, in turn, each of the error action placeholders is replaced with the lines of code corresponding to the matched macros.

Abstract: An approach is provided in which a request is received from a software module to retrieve a value stored in a pre-defined location. Prior to retrieving the value, an override tank is checked for a corresponding override value. When the override tank includes an override value, the override value in the override tank is provided to the software module. When the override tank fails to include a corresponding override value, an actual value is retrieved from a pre-defined storage location and provided to the software module. In one embodiment, the override value is an override system attribute value. In another embodiment, the override value is an override function return value.

Abstract: An approach is provided in which a request is received from a software module to retrieve a value stored in a pre-defined location. Prior to retrieving the value, an override tank is checked for a corresponding override value. When the override tank includes an override value, the override value in the override tank is provided to the software module. When the override tank fails to include a corresponding override value, an actual value is retrieved from a pre-defined storage location and provided to the software module. In one embodiment, the override value is an override system attribute value. In another embodiment, the override value is an override function return value.

Abstract: According to one embodiment of the present disclosure, hardware initialization code and error action information are retrieved from separate storage areas. The hardware initialization code includes code that initializes a device, and also includes placeholders corresponding to actions that are performed when the device fails initialization. Likewise, the error action information describes the actions that are performed when the device fails initialization. The error action information is converted into macros that include lines of code. As such, the error action placeholders are matched to the macros and, in turn, each of the error action placeholders is replaced with the lines of code corresponding to the matched macros.

Abstract: According to one embodiment of the present disclosure, hardware initialization code and error action information are retrieved from separate storage areas. The hardware initialization code includes code that initializes a device, and also includes placeholders corresponding to actions that are performed when the device fails initialization. Likewise, the error action information describes the actions that are performed when the device fails initialization. The error action information is converted into macros that include lines of code. As such, the error action placeholders are matched to the macros and, in turn, each of the error action placeholders is replaced with the lines of code corresponding to the matched macros.

Abstract: An approach is provided in which a request is received from a software module to retrieve a value stored in a pre-defined location. Prior to retrieving the value, an override tank is checked for a corresponding override value. When the override tank includes an override value, the override value in the override tank is provided to the software module. When the override tank fails to include a corresponding override value, an actual value is retrieved from a pre-defined storage location and provided to the software module. In one embodiment, the override value is an override system attribute value. In another embodiment, the override value is an override function return value.

Abstract: An approach is provided in which a request is received from a software module to retrieve a value stored in a pre-defined location. Prior to retrieving the value, an override tank is checked for a corresponding override value. When the override tank includes an override value, the override value in the override tank is provided to the software module. When the override tank fails to include a corresponding override value, an actual value is retrieved from a pre-defined storage location and provided to the software module. In one embodiment, the override value is an override system attribute value. In another embodiment, the override value is an override function return value.

Abstract: A method provides processor initialization in different platform environments via a single code set. The method includes: in response to detecting a power-on operation of the processor, a microcontroller retrieving hardware procedures (HWP) framework code from a storage and triggering execution of the HWP framework code on the processor. The execution of the HWP framework code generates a HWP framework that comprises a plurality of application programming interfaces (APIs) which govern how all communication processes involving hardware procedures can be accomplished. The method further includes performing one or more initialization procedures by communicating one or more attribute data via the HWP framework to configure the processor for operation within a specific platform environment in which the processor is to be operated. The HWP framework includes standard interfaces and enables direct updates to hardware procedures without requiring a new flash code or a firmware patch.

Abstract: A method for initializing processor cores in a multiprocessor system. The method includes a microcontroller initializing a first processor utilizing a common initialization image for all processor cores within the first processor. The first processor detects and executes system firmware. All remaining processors are initialized utilizing the common initialization image. The executing firmware detects a system configuration of the multiprocessor system. A customized processor initialization image for each of the processor cores in the multiprocessor system is generated and stored to a storage device. The processor cores are triggered to enter a power save state in which all initialization settings of the processor cores are lost. In response to all the processor cores entering the power save state, the first processor core of the first processor is re-initialized using a first customized initialization image generated for the first processor core.

Abstract: A system and computer program product provide processor initialization in different platform environments via a single code set. The system includes: in response to detecting a power-on operation of the processor, a microcontroller retrieving hardware procedures (HWP) framework code from a storage and triggering execution of the HWP framework code on the processor. The execution of the HWP framework code generates a HWP framework that comprises a plurality of application programming interfaces (APIs) which govern how all communication processes involving hardware procedures can be accomplished. The system further includes the microcontroller performing one or more initialization procedures by communicating one or more attribute data via the HWP framework to configure the processor for operation within a specific platform environment in which the processor is to be operated.

Abstract: A system and computer program product for initializing processor cores in a multiprocessor system. The system includes a microcontroller that initializes a first processor utilizing a common initialization image for all processor cores within the first processor. The first processor detects and executes system firmware. All remaining processors are initialized utilizing the common initialization image. The executing firmware detects a system configuration of the multiprocessor system. A customized processor initialization image for each of the processor cores in the multiprocessor system is generated and stored to a storage device. The processor cores are triggered to enter a power save state in which all initialization settings of the processor cores are lost. In response to all the processor cores entering the power save state, the first processor core of the first processor is re-initialized using a first customized initialization image generated for the first processor core.

Abstract: Illustrative embodiments manage deadlock in a data processing system during an IPL process that includes monitoring the usage of locks in the Hardware Object Model (HOM) of the data processing system. The process further includes detecting a deadlock condition in response to an indication of the IPL process in the data processing system entering a hung state when at least one lock is in use. The process also includes handling the deadlock condition by performing one or more of the following: recording error information for the deadlock condition, and terminating the IPL process.

Abstract: A method for managing deadlock in a data processing system during an IPL process includes monitoring the usage of locks in the Hardware Object Model (HOM) of the data processing system. The process further includes detecting a deadlock condition in response to an indication of the IPL process in the data processing system entering a hung state when at least one lock is in use. The process further includes handling the deadlock condition by performing one or more of the following: recording error information for the deadlock condition, and terminating the IPL process.