Abstract: A tag RAM is coupled to an address bus that is adapted to carry a variable width address field. The tag RAM includes a memory section coupled to the address bus and a comparator coupled to the address bus and the memory section. The tag RAM further includes a selection module coupled to the address bus and coupled to the comparator. The selection module selects one or more bits of the address field as tag field bits depending on the width of the address field and the size of the cache memory coupled to the tag RAM.

Abstract: A tag RAM is coupled to an address bus that is adapted to carry a variable width address field. The tag RAM includes a memory section coupled to the address bus and a comparator coupled to the address bus and the memory section. The tag RAM further includes a selection module coupled to the address bus and coupled to the comparator. The selection module selects one or more bits of the address field as tag field bits depending on the width of the address field and the size of the cache memory coupled to the tag RAM.

Abstract: An apparatus and method for enabling multiple sense amps in a burst read memory is described. The sense amps are divided into two sets which are then enabled at slightly different times. The time difference is set so that a maximum power consumption experienced when the sense amps are enabled is reduced significantly, but the effect on the total time needed to read the data is not increased.

Abstract: A circuit for converting an input signal derived from a low voltage power supply to an output signal derived from a high voltage power supply is disclosed. A driver circuit and a conversion circuit simultaneously receive the low voltage input signal. The driver circuit changes states when the input signal transitions and the output signal switches accordingly. The conversion circuit simultaneously generates a high voltage signal that causes a decoupler circuit to eliminate any DC leakage through the driver circuit. The driver circuit utilizes a bipolar transistor to increase drive capability.

Abstract: An apparatus and method for enabling multiple sense amps in a burst read memory is described. The sense amps are divided into two sets which are then enabled at slightly different times. The time difference is set so that a maximum power consumption experienced when the sense amps are enabled is reduced significantly, but the effect on the total time needed to read the data is not increased.