Abstract: A sampling circuit includes a metal oxide semiconductor (MOS) transistor that includes a third metallization receiving a reference voltage between a first metallization coupled to a source region of the transistor and a second metallization coupled to a drain region of the transistor.

Abstract: An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.

Abstract: A sampling circuit includes a metal oxide semiconductor (MOS) transistor that includes a third metallization receiving a reference voltage between a first metallization coupled to a source region of the transistor and a second metallization coupled to a drain region of the transistor.

Abstract: An acquisition stage receives a digital input signal and generates therefrom a first digital signal and a second digital signal complementary thereto. First and second processing stages receive the first and second digital signals and generate therefrom first and second analog signals in time with first and second complementary clock signals. An output stage generates an internal clock signal equivalent to one of: the first clock signal phase shifted by a duration of a transient occurring during a period of the first clock signal, or the second clock signal phase shifted by a duration of a transient occurring during a period of the second clock signal. The output stage produces an analog output signal equal to the first analog signal when the internal clock signal is at a first logic level, and equal to the second analog signal when the internal clock signal is at a second logic level.

Abstract: In a mobile communication device a loopback technique is used to enable the receive chain circuitry and digital baseband block to perform self tests on the transmit chain circuitry of the same mobile communication device for 2G and 2.5G operating Bands and channels. A transmit chain circuit is set to transmit a selected receive Band channel, which is attenuated via a loopback path within the mobile communication device's front end module and, in some embodiments, via a leakage signal path between adjacent or proximate LNA inputs of separate receive chain circuits.

Abstract: In a mobile communication device a loopback technique is used to enable the receive chain circuitry and digital baseband block to perform self tests on the transmit chain circuitry of the same mobile communication device for 2G and 2.5G operating Bands and channels. A transmit chain circuit is set to transmit a selected receive Band channel, which is attenuated via a loopback path within the mobile communication device's front end module and, in some embodiments, via a leakage signal path between adjacent or proximate LNA inputs of separate receive chain circuits.

Abstract: A cascode LNA circuit is provided with a tuned inductive load. The circuit shows a flat response over a wide frequency range.

Abstract: The present wireless transceiver includes a tuneable narrow band LNA which rejects dramatically any out of band interferers. The tuneable narrow band LNA may be operable over a wide frequency band. A loopback calibration procedure is used to control the tuneable narrow band LNA so as to produce a substantially flat gain characteristic over the band of interest.

Abstract: A cascode LNA circuit is provided with a tuned inductive load. The circuit shows a flat response over a wide frequency range.

Abstract: The present invention generally speaking, provides for adaptive control of an RF power amplifier in view of a desired data rate. For low data rates, the RF amplifier (121) is controlled so as to allow significant output signal distortion, at the same time operating within a region of increased efficiency of the RF power amplifier. For higher data rates, the RF amplifier (121) is controlled so as to reduce the output signal distortion. During such times, lower efficiency of the RF power amplifier is attained. Efficiency of the RF power amplifier (121) is thus maximized in view of data rate requirements. In the case of battery-powered radio transmitter, increased efficiency results in longer battery life. In a specific embodiment, an on-the-fly calibration is performed in which output signal distortion is measured. A precalculated table stores information relating output signal distortion to expected Error Vector Magnitude (EVM) at the radio receiver.

Abstract: A portable communication device has an antenna configuration that allows to form various different antenna directivity configurations. In particular, a control device discriminates between a transmitting state and a receiving state of the communication device. As based thereon, it effects various non-uniform selection patterns among the directivity configurations.

Abstract: A transmitter has a power amplifier amplifying a radio frequency transmit signal. The radio frequency transmit signal is a non-constant envelope modulated signal. The power amplifier has a first compression point. In a method for sliding a compression point in the transmitter, the power amplifier is operated at a first backoff from the first compression point such that a given adjacent channel power ratio requirement is met for a first peak-to-average ratio of the radio frequency transmit signal. The first compression point is slide to a second compression point for a second peak-to-average ratio of the radio frequency transmit signal, the second compression point being lower than the first compression point. The first and second peak-to-average ratios are dependent on information content of the non-constant envelope modulated signal.

Abstract: A transmitter has a power amplifier amplifying a radio frequency transmit signal. The radio frequency transmit signal is a non-constant envelope modulated signal. The power amplifier has a first compression point. In a method for sliding a compression point in the transmitter, the power amplifier is operated at a first backoff from the first compression point such that a given adjacent channel power ratio requirement is met for a first peak-to-average ratio of the radio frequency transmit signal. The first compression point is slide to a second compression point for a second peak-to-average ratio of the radio frequency transmit signal, the second compression point being lower than the first compression point. The first and second peak-to-average ratios are dependent on information content of the non-constant envelope modulated signal.

Abstract: A radio communication apparatus is disclosed having a transceiver which receives and transmits signals; an excitation link which is connected to the transceiver; and a rod antenna which is electrically connected at a first tip to the excitation link in an extended position and electrically disconnected from the excitation link in a retracted position. A first coil is located around the rod antenna in a housing, where the first coil has a first end connected to the excitation link. Further, a conducting ring is located over the housing, where the conducting ring contacts a second end of the first coil. An insulating element is located at a second tip of the rod antenna, and a conductive plate is located over the insulating element. The conductive plate is perpendicular to the rod antenna and is parallel to the conducting ring.