Abstract: A PoDL system includes a PSE supplying DC power and Ethernet data over a single twisted wire pair to a PD. Prior to coupling the DC voltage source to the wire pair, the PD needs to receive sufficient power to perform a detection and classification routine with the PSE to determine whether the PD is PoDL-compatible. The PSE has a low current, pull-up current source coupled to a first wire in the wire pair via a first inductor. This pull-up current charges a capacitor in the PD to a desired operating voltage, and the operating voltage is used to power a PD logic circuit. The PD logic circuit and a PSE logic circuit then control pull-down transistors to communicate detection and classification data via the first wire. After the handshaking phase, the PSE then applies the DC voltage source across the wire pair to power the PD for normal operation.

Abstract: Power Sourcing Equipment (PSE) provides a PoE supply voltage over data wires to a Powered Device (PD). A PSE controller controls a first FET that couples the PoE voltage to the data wire pairs and controls a second FET that couples the data wire pairs to the spare wire pairs. Upon powering up, the PSE controller keeps the two FETs open and performs a detection routine on any devices connected to the data pairs and spare pairs. If a PoE-compatible PD is detected as being coupled to the data pairs, the first switch is closed. If it is determined that the PoE voltage should also be coupled to the spare pairs, the second FET is also closed. The method prevents the PoE voltage from being applied to the spare pairs when the device connected to the spare pairs is not PoE compatible and maintains backwards compliance with IEEE PoE PDs.

Abstract: A Power Over Data Lines (PoDL) system includes Power Sourcing Equipment (PSE) supplying DC power and differential Ethernet data over a single twisted wire pair to a Powered Device (PD). Due to start-up perturbations, PD load current variations, and other causes, dV/dt noise is introduced in the power signal. Such noise may be misinterpreted as data unless mitigated somehow. Rather than increasing the values of the passive filtering components conventionally used for decoupling/coupling the power and data from/to the wire pair, active circuitry is provided in the PSE, PD, or both to limit dV/dt in the power signal. Such circuitry may be implemented on the same chip as the PSE controller or PD controller. Therefore, the sizes of the passive components in the decoupling/coupling networks may be reduced.

Abstract: A PSE includes a PSE controller that performs a handshaking routine with any PDs connected to the data wire pairs and spare wire pairs and applies power to the data wire pairs and spare wire pairs, via a switch, if certain conditions are met. Two different levels of currents are supplied to different terminals of the PSE controller that are connected to the data wire pairs and the spare wire pairs, and the resulting voltages are measured. The voltages are used to determine the PD impedances at the ends of the data wire pairs and spare wire pairs to determine whether a PD is connected to the data wire pair, whether another PD is connected to the spare wire pair, or whether a single PD is connected to both the data wire pairs and the spare wire pairs.

Abstract: In a method performed by a PoE system, a PSE is able to detect whether a PD is compatible for receiving power via four wire pairs in the standard Ethernet cable. The PSE provides a current limited voltage to a first and second pair of wires in the cable, during a detection phase, to detect a characteristic impedance of the PD. In the PSE, a first resistor is connected to a third wire pair and a second resistor is connected to a fourth wire pair. During the detection phase, the PSE detects the relative currents through the resistors. If the currents are the same, then the PSE knows the PD is able to receive power via the four wire pairs. The PSE then applies the full PoE voltage to the first and second wire pairs and connects the third and fourth wire pairs to a low voltage via a MOSFET.

Abstract: A PoDL system includes a PSE connected via a wire pair to a PD, where differential data and DC power are transmitted over the same wire pair. Typically, low voltage/current detection and classification routines are required upon every powering up of the system to allow the PD to convey its PoDL requirements to the PSE. Various techniques are described that simplify or obviate such start-up routines or enable increased flexibility for the PoDL system. Such techniques include: ways to specify a particular PD operating voltage; ways to disable the PD's UVLO circuit during such routines; using opposite polarity voltages for the two routines; using voltage limiters or surge protectors to convey the PoDL information; detecting loop resistance; using a PSE memory to store previous results of the routines; and powering the PD communication circuit using the wire pair while the PD load is powered by an alternate power source.

Abstract: In a method performed by a PoE system, a PSE provides data and operating voltage over Ethernet wires to a PD. Before the full PoE voltage is supplied, the PSE generates a low current signal received by the PD. A circuit in the PD, connected across its input terminals, has a characteristic analog response to the PSE signal corresponding to the PD's PoE requirements, such as whether the PD is a Type 1 or Type 2 PD. The circuit may be a certain value capacitor, zener diode, resistor, or other circuit. The PSE may generate a fixed current, fixed voltage, or time varying signal. Upon the PSE sensing the magnitude of the analog signal response at a particular time, the PSE associates the response with the PoE requirements of the PD. The PSE then applies the full PoE voltage in accordance with the PD's PoE requirements.

Abstract: Power Sourcing Equipment (PSE) provides a PoE supply voltage over data wires to a Powered Device (PD). A PSE controller controls a first FET that couples the PoE voltage to the data wire pairs and controls a second FET that couples the data wire pairs to the spare wire pairs. Upon powering up, the PSE controller keeps the two FETs open and performs a detection routine on any devices connected to the data pairs and spare pairs. If a PoE-compatible PD is detected as being coupled to the data pairs, the first switch is closed. If it is determined that the PoE voltage should also be coupled to the spare pairs, the second FET is also closed. The method prevents the PoE voltage from being applied to the spare pairs when the device connected to the spare pairs is not PoE compatible and maintains backwards compliance with IEEE PoE PDs.

Abstract: System and methodology for managing power supplied to powered devices over communication links, such as Ethernet links. A power supply system has multiple power supply ports for providing power to respective powered devices via multiple communication links. A power-in-use bus shared by the multiple power supply ports is configured for receiving a power-in-use signal representing total amount of power being used by the powered devices. Multiple port control circuits associated with the power supply ports are responsive to the power-in-use signal for controlling supply of power to the respective powered devices.

Abstract: A Power over Ethernet (PoE) system having a Power Sourcing Equipment (PSE) and a Powered Device (PD) configured for interacting over four pairs of wire provided for supplying power from the PSE to the PD. The PSE and the PD are configured to perform separate PD classification procedures over first and second 2-pair sets to support PoE operations that are not defined by the IEEE 802.3af standard.

Abstract: A novel system and methodology for supplying power over a communication cable, such as an Ethernet cable, using power distribution circuitry for controlling power distribution between wires or pairs of wires in the communication cable. The power distribution circuitry may control distribution of current among wires or pairs of wires in the communication cable. In particular, balance of current among the wires or pairs of wires may be provided.

Abstract: A system for supplying power to a load over a communication link has high-side current sensing circuitry for measuring a high-side current value, low-side current sensing circuitry for measuring a low-side current value, and control circuitry responsive to both the high-side current value and the low-side current value to detect a fault condition, detect information from the load, and/or transmit information to the load by creating a prescribed unbalance between the high-side current and the low-side current.

Abstract: A novel system and methodology for controlling an output of Power Sourcing Equipment in a Power over Ethernet system based on a current limit threshold. The PSE has an auto-zero circuit for comparing a monitored output current of the PSE with the current limit threshold to control the output of the PSE.

Abstract: Novel circuitry and methodology for providing data communication between a power supply device and a powered device in a system for supplying power over a communication link. The power supply device, such a device for supplying power over Ethernet, receives from the powered device detection information for detecting the powered device and classification information for determining a power level of the powered device. Information circuitry may be provided for handling information presented by the powered device in addition to the detection and classification information.

Abstract: Circuitry and methodology for providing data transmission in a Power over Ethernet (PoE) system having a Power Sourcing Equipment (PSE) for providing power to a PoE link, and a Powered Device (PD) coupled to the PoE link for receiving the power from the PSE. The PSE and PD support data communication with each other in a common mode between two pairs of lines in an Ethernet twisted pair cable.

Abstract: Electronic devices, and methods, for transmitting, transferring and/or conveying a multi-bit digital signal as a voltage signal via a single pin. Devices and methods according to the invention substantially reduce the pin count of a device because inputting of a multi-bit digital signal preferably does not use more than one input pin. In addition, the speed of transmission is improved because the multi-bit digital signal is transmitted as a voltage signal substantially at one time as opposed to serially.

Abstract: Electronic devices, and methods, for transmitting, transferring and/or conveying a multi-bit digital signal as a voltage signal via a single pin. Devices and methods according to the invention substantially reduce the pin count of a device because inputting of a multi-bit digital signal preferably does not use more than one input pin. In addition, the speed of transmission is improved because the multi-bit digital signal is transmitted as a voltage signal substantially at one time as opposed to serially.