Patents by Inventor David E. Douse

David E. Douse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6570254
    Abstract: Mask programmable conductors of the same construction as the mask layers they define are utilized for mask vintage identification. When the actual mask layer is altered, the change is recorded within the mask itself. Mask identification can be fabricated to identify the following type of mask layers: DT—deep trench; SS—surface strap; DIFF—Diffusion; NDIFF—N Diffusion; PDIFF—P Diffusion; WL—N wells; PC—polysilicon gates; BN—N diffusion Implant; BP—P diffusion Implant; C1—first contact; M1—first metal layer; C2—second contact; and, M2—second metal layer. Conducting paths that incorporate, in series, the mask programmable conductor technology devices are: M1-C1-PC-C1-DIFF-C1-M1-C2-M2; M1-C1-PDIFF-SS-DT-SS-PDIFF-C1-M1-C2-M2; M2-C2-M1-C1-PC-C1-M1; M2-C2-M1-C1-NDIFF-WL-NDIFF-C1-M1; and, M2-C2-M1-C1-NDIFF-C1-M1-C1-PC-C1-M1. These conducting paths are electrically opened with the omission of any of the layers in the series path.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: May 27, 2003
    Assignee: International Business Machines Corporation
    Inventors: John B. DeForge, David E. Douse, Steven M. Eustis, Erik L. Hedberg, Susan M. Litten, Endre P. Thoma
  • Patent number: 6400202
    Abstract: A programmable delay element includes a current source field-effect transistor (FET), a switch device, a precharge device, and an inverter device. The current source FET gates a programmable, predetermined amount of current. The switch device, which is coupled to the current source PET, receives an input signal having a first and second voltage level. The precharge device precharges the node coupled to the drain of the current source FET when the input signal is at a second voltage level. The inverter device, which is also coupled to the drain of the current source FET, outputs a delayed signal when the input signal is at a first voltage level, the delay of the delayed signal defined by the programmable, predetermined amount of current. The inverter device generates an inverter switch point that is substantially independent of parametric sensitivities, such as temperature variations.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: June 4, 2002
    Assignee: International Business Machines Corporation
    Inventors: John A. Fifield, Nicholas M. van Heel, Mark D. Jacunski, David E. Chapman, David E. Douse
  • Publication number: 20020030524
    Abstract: A programmable delay element includes a current source field-effect transistor (FET), a switch device, a precharge device, and an inverter device. The current source FET gates a programmable, predetermined amount of current. The switch device, which is coupled to the current source FET, receives an input signal having a first and second voltage level. The precharge device precharges the node coupled to the drain of the current source FET when the input signal is at a second voltage level. The inverter device, which is also coupled to the drain of the current source FET, outputs a delayed signal when the input signal is at a first voltage level, the delay of the delayed signal defined by the programmable, predetermined amount of current. The inverter device generates an inverter switch point that is substantially independent of parametric sensitivities, such as temperature variations.
    Type: Application
    Filed: November 19, 2001
    Publication date: March 14, 2002
    Inventors: John A. Fifield, Nicholas M. van Heel, Mark D. Jacunski, David E. Chapman, David E. Douse
  • Patent number: 6348827
    Abstract: A programmable delay element includes a current source field-effect transistor (FET), a switch device, a precharge device, and an inverter device. The current source FET gates a programmable, predetermined amount of current. The switch device, which is coupled to the current source FET, receives an input signal having a first and second voltage level. The precharge device precharges the node coupled to the drain of the current source FET when the input signal is at a second voltage level. The inverter device, which is also coupled to the drain of the current source FET, outputs a delayed signal when the input signal is at a first voltage level, the delay of the delayed signal defined by the programmable, predetermined amount of current. The inverter device generates an inverter switch point that is substantially independent of parametric sensitivities, such as temperature variations.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: February 19, 2002
    Assignee: International Business Machines Corporation
    Inventors: John A. Fifield, Nicholas M. van Heel, Mark D. Jacunski, David E. Chapman, David E. Douse
  • Patent number: 6268228
    Abstract: Mask programmable conductors of the same construction as the mask layers they define are utilized for mask vintage identification. When the actual mask layer is altered, the change is recorded within the mask itself. Mask identification can be fabricated to identify the following type of mask layers: DT—deep trench; SS—surface strap; DIFF—Diffusion; NDIFF—N Diffusion; PDIFF—P Diffusion; WL—N wells; PC—polysilicon gates; BN—N diffusion Implant; BP—P diffusion Implant; C1—first contact; M1—first metal layer; C2—second contact; and, M2—second metal layer. Conducting paths that incorporate, in series, the mask programmable conductor technology devices are: M1-C1-PC-C1-DIFF-C1-M1-C2-M2; M1-C1-PDIFF-SS-DT-SS-PDIFF-C1-M1-C2-M2; M2-C2-M1-C1-PC-C1-M1; M2-C2-M1-C1-NDIFF-WL-NDIFF-C1-M1; and, M2-C2-M1-C1-NDIFF-C1-M1-C1-PC-C1-M1. These conducting paths are electrically opened with the omission of any of the layers in the series path.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: July 31, 2001
    Assignee: International Business Machines Corporation
    Inventors: John B. DeForge, David E. Douse, Steven M. Eustis, Erik L. Hedberg, Susan M. Litten, Endre P. Thoma
  • Patent number: 6014046
    Abstract: An Off Chip Driver (OCD) having a high, a low and a high impedance (Hi-Z) state. The OCD includes an up-level pre-drive, a down-level pre-drive and a driver. The driver mirrors current in the up-level pre-drive and down-level pre-drive. Both pre-drive circuits have an unbalanced input-dependant delay to quickly turn off/on the on and off driver devices and, after a delay, reduce the drive on the turned on device to a steady state level. The delay may have a fixed length set by an inverter chain or may be dependent upon output voltage.
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: January 11, 2000
    Assignee: International Business Machines Corporation
    Inventors: David E. Douse, Scott C. Lewis, Thomas M. Maffitt
  • Patent number: 5446695
    Abstract: A programmable self-timed refresh circuit for a semiconductor memory array and methods for programming the self-refresh rate and for non-invasively and deterministically testing the self-timed refresh circuit for establishing/verifying a refresh rate and a wait state interval for the self-refresh operation. The programmable refresh circuit includes a self-timed oscillator that outputs a clocking signal, and a programmable pattern generator that outputs a first signal pattern and a second signal pattern. The first signal pattern is fed to a counter circuit which also receives the clocking signal. The counter circuit outputs a signal pulse whenever the count driven by the clocking signal reaches a digital pattern representation corresponding to the first signal pattern generated by the programmable pattern generator. Refresh control logic is connected to receive the pulse signal and respond thereto by refreshing a portion of the memory array of the semiconductor memory device.
    Type: Grant
    Filed: March 22, 1994
    Date of Patent: August 29, 1995
    Assignee: International Business Machines Corporation
    Inventors: David E. Douse, Wayne F. Ellis, Erik L. Hedberg