Patents by Inventor David E. Merry, Jr.

David E. Merry, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8549236
    Abstract: A storage subsystem contains multiple non-volatile memory arrays that are accessible to a host system when the storage subsystem is connected thereto. The storage subsystem implements commands and/or modes for enabling the host system to create and use backup copies of files, such that the host system can recover when files become corrupted or otherwise lost. In one embodiment, the storage subsystem presents the non-volatile memory arrays to the host's operating system as distinct storage devices (e.g., ATA device 0 and 1), and implements special commands for copying data between these storage devices. The subsystem may alternatively present the memory arrays to the host operating system as a single storage device. The storage subsystem may have a standard form factor, such as a form factor commonly used for memory cards.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: October 1, 2013
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 8312207
    Abstract: A non-volatile solid-state storage subsystem, such as a non-volatile memory device, maintains usage statistics reflective of the wear state, and thus the remaining useful life, of the subsystem's memory array. A host system reads the usage statistics information, or data derived therefrom, from the subsystem to evaluate the subsystem's remaining life expectancy. The host system may use this information for various purposes, such as to (a) display or report information regarding the remaining life of the subsystem; (b) adjust the frequency with which data is written to the subsystem; and/or (c) select the type(s) of data written to the subsystem.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: November 13, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: David E. Merry, Jr., Mark S. Diggs, Gary A. Drossel
  • Patent number: 8296625
    Abstract: A storage subsystem monitors one or more conditions related to the probability of a data error occurring. Based on the monitored condition or conditions, the storage subsystem adjusts an error correction setting, and thus the quantity of ECC data used to protect data received from a host system. To enable blocks of data to be properly checked when read from memory, the storage subsystem stores ECC metadata indicating the particular error correction setting used to store particular blocks of data. The storage subsystem may be in the form of a solid-state non-volatile memory card or drive that attaches to the host system.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: October 23, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Publication number: 20120151130
    Abstract: A non-volatile solid-state storage subsystem, such as a non-volatile memory device, maintains usage statistics reflective of the wear state, and thus the remaining useful life, of the subsystem's memory array. A host system reads the usage statistics information, or data derived therefrom, from the subsystem to evaluate the subsystem's remaining life expectancy. The host system may use this information for various purposes, such as to (a) display or report information regarding the remaining life of the subsystem; (b) adjust the frequency with which data is written to the subsystem; and/or (c) select the type(s) of data written to the subsystem.
    Type: Application
    Filed: February 17, 2012
    Publication date: June 14, 2012
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: DAVID E. MERRY, JR., MARK S. DIGGS, GARY A. DROSSEL
  • Publication number: 20120144270
    Abstract: A storage subsystem monitors one or more conditions related to the probability of a data error occurring. Based on the monitored condition or conditions, the storage subsystem adjusts an error correction setting, and thus the quantity of ECC data used to protect data received from a host system. To enable blocks of data to be properly checked when read from memory, the storage subsystem stores ECC metadata indicating the particular error correction setting used to store particular blocks of data. The storage subsystem may be in the form of a solid-state non-volatile memory card or drive that attaches to the host system.
    Type: Application
    Filed: January 5, 2012
    Publication date: June 7, 2012
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: MARK S. DIGGS, DAVID E. MERRY, JR.
  • Patent number: 8166245
    Abstract: A solid-state storage subsystem, such as a non-volatile memory card or drive, includes multiple interfaces and a memory area storing information used by a data arbiter to prioritize data commands received through the interfaces. As one example, the information may store a priority ranking of multiple host systems that are connected to the solid-state storage subsystem, such that the data arbiter may process concurrently received data transfer commands serially according to their priority ranking. A host software component may be configured to store and modify the priority control information in solid-state storage subsystem's memory area.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: April 24, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 8161227
    Abstract: A non-volatile storage subsystem is capable of serving as a configuration controller for configuring/programming one or more field-programmable devices, such as FPGAs, of a target computer system. The storage subsystem may be in the form of a memory card or drive that plugs into a standard slot or external port of the target system. When connected to the target system, the storage subsystem uses the appropriate download interface/protocol to stream or otherwise send configuration data stored in its non-volatile storage to the target system's field-programmable device(s). Thus, the need for a configuration controller in the target system is avoided. Once the configuration process is complete, the storage subsystem preferably acts as a standard storage subsystem, such as an ATA storage drive, that may be used by the target system to store data.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: April 17, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 8151020
    Abstract: A storage subsystem includes a variable-size write buffer that temporarily stores write data received from a host system. The storage subsystem is capable of adjusting the size of the write buffer so as to vary both the performance (e.g., sustained write speed) of the storage subsystem and a risk of data loss. In one embodiment, the storage subsystem implements a command set that enables the host system to directly control the size of the write buffer. The storage subsystem may additionally or alternatively be capable of adjusting the size of the write buffer based on monitored operating conditions, such as the temperature, the stability/consistency of a power signal received from the host system, and/or the elapsed time since the storage subsystem was last powered up.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: April 3, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: David E. Merry, Jr., Mark S. Diggs
  • Patent number: 8122185
    Abstract: A non-volatile solid-state storage subsystem, such as a non-volatile memory device, maintains usage statistics reflective of the wear state, and thus the remaining useful life, of the subsystem's memory array. A host system reads the usage statistics information, or data derived therefrom, from the subsystem to evaluate the subsystem's remaining life expectancy. The host system may use this information for various purposes, such as to (a) display or report information regarding the remaining life of the subsystem; (b) adjust the frequency with which data is written to the subsystem; and/or (c) select the type(s) of data written to the subsystem.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: February 21, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: David E. Merry, Jr., Mark S. Diggs, Gary A. Drossel
  • Patent number: 8095851
    Abstract: A storage subsystem monitors one or more conditions related to the probability of a data error occurring. Based on the monitored condition or conditions, the storage subsystem adjusts an error correction setting, and thus the quantity of ECC data used to protect data received from a host system. To enable blocks of data to be properly checked when read from memory, the storage subsystem stores ECC metadata indicating the particular error correction setting used to store particular blocks of data. The storage subsystem may be in the form of a solid-state non-volatile memory card or drive that attaches to the host system.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: January 10, 2012
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 8078918
    Abstract: A storage subsystem is disclosed that maintains (a) statistics regarding errors detected via an ECC (error correction code) module of the storage subsystem; and/or (b) historical data regarding operating conditions experienced by the storage subsystem, such as temperature, altitude, humidity, shock, and/or input voltage level. The storage subsystem, and/or a host system to which the storage subsystem attaches, may analyze the stored data to assess a risk of a failure event such as an uncorrectable data error. The results of this analysis may be displayed via a user interface of the host system, and/or may be used to automatically take a precautionary action such as transmitting an alert message or changing a mode of operation of the storage subsystem.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: December 13, 2011
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 7962792
    Abstract: A non-volatile storage subsystem maintains, and makes available to a host system, monitor data reflective of a likelihood of a data error occurring. The monitor data may, for example, include usage statistics and/or sensor data. The storage subsystem transfers the monitor data to the host system over a signal interface that is separate from the signal interface used for standard storage operations. This interface may be implemented using otherwise unused pins/signal lines of a standard connector, such as a CompactFlash or SATA connector. Special hardware may be provided in the storage subsystem and host system for transferring the monitor data over these signal lines, so that the transfers occur with little or no need for host-software intervention. The disclosed design reduces or eliminates the need for host software that uses non-standard or “vendor-specific” commands to retrieve the monitor data.
    Type: Grant
    Filed: February 11, 2008
    Date of Patent: June 14, 2011
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 7936603
    Abstract: A storage system that comprises multiple solid-state storage devices includes a command set that enables a host system to initiate one or more types of purge operations. The supported purge operations may include an erase operation in which the storage devices are erased, a sanitization operation in which a pattern is written to the storage devices, and/or a destroy operation in which the storage devices are physically damaged via application of a high voltage. The command set preferably enables the host system to specify how many of the storage devices are to be purged at a time during a purge operation. The host system can thereby control the amount of time, and the current level, needed to complete the purge operation. In some embodiments, the number of storage devices that are purged at a time may additionally or alternatively be selectable by a controller of the storage system.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: May 3, 2011
    Assignee: SiliconSystems, Inc.
    Inventors: David E. Merry, Jr., Michael J. Hajeck
  • Patent number: 7898855
    Abstract: A memory system comprising one or more memory devices is purged to prevent unauthorized access to data stored therein. A host system passes control of purge operations to the memory system. The purge operations are configured to erase data, write a pattern to memory locations, physically damage the memory devices in the memory system, or combinations of the foregoing. The memory system can perform a purge operation on two or more memory devices in parallel. The memory system includes a destroy circuit to provide an over-current and/or over-voltage condition to the memory devices. The memory system also includes one or more isolation circuits to protect control circuitry in the memory system from the over-current and/or over-voltage condition. In some embodiments, the memory system includes a backup battery so it can complete a purge operation if it loses its power connection to the host system.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: March 1, 2011
    Assignee: Siliconsystems, Inc.
    Inventors: David E. Merry, Jr., Michael J. Hajeck
  • Publication number: 20100174856
    Abstract: A solid-state storage subsystem, such as a non-volatile memory card or drive, includes multiple interfaces and a memory area storing information used by a data arbiter to prioritize data commands received through the interfaces. As one example, the information may store a priority ranking of multiple host systems that are connected to the solid-state storage subsystem, such that the data arbiter may process concurrently received data transfer commands serially according to their priority ranking. A host software component may be configured to store and modify the priority control information in solid-state storage subsystem's memory area.
    Type: Application
    Filed: March 16, 2010
    Publication date: July 8, 2010
    Applicant: SILICONSYSTEMS, INC.
    Inventors: Mark S. Diggs, David E. Merry, JR.
  • Publication number: 20100122200
    Abstract: A non-volatile solid-state storage subsystem, such as a non-volatile memory device, maintains usage statistics reflective of the wear state, and thus the remaining useful life, of the subsystem's memory array. A host system reads the usage statistics information, or data derived therefrom, from the subsystem to evaluate the subsystem's remaining life expectancy. The host system may use this information for various purposes, such as to (a) display or report information regarding the remaining life of the subsystem; (b) adjust the frequency with which data is written to the subsystem; and/or (c) select the type(s) of data written to the subsystem.
    Type: Application
    Filed: January 15, 2010
    Publication date: May 13, 2010
    Applicant: SILICONSYSTEMS, INC.
    Inventors: David E. Merry, JR., Mark S. Diggs, Gary A. Drossel
  • Patent number: 7685374
    Abstract: A solid-state storage subsystem, such as a non-volatile memory card or drive, includes multiple interfaces and a memory area storing information used by a data arbiter to prioritize data commands received through the interfaces. As one example, the information may store a priority ranking of multiple host systems that are connected to the solid-state storage subsystem, such that the data arbiter may process concurrently received data transfer commands serially according to their priority ranking. A host software component may be configured to store and modify the priority control information in solid-state storage subsystem's memory area.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: March 23, 2010
    Assignee: SiliconSystems, Inc.
    Inventors: Mark S. Diggs, David E. Merry, Jr.
  • Patent number: 7685337
    Abstract: A non-volatile storage subsystem solution is provided for embedded applications. The storage subsystem is preferably designed to communicate with the host system using a signal interface, such as a USB or SATA interface, that uses substantially fewer signal lines than the IDE interface traditionally used for embedded applications. Thus, the amount of board real estate used to carry interface signals in the host system is reduced. To further reduce board real estate, the host system may include a processor that includes an integrated controller (e.g., a USB or SATA controller) corresponding to the host-subsystem signal interface. The storage subsystem may plug into, and lock to, an internal connector on a circuit board of the host system.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: March 23, 2010
    Assignee: SiliconSystems, Inc.
    Inventors: David E. Merry, Jr., Mark S. Diggs
  • Patent number: 7685338
    Abstract: A non-volatile storage subsystem solution is provided for embedded applications. The storage subsystem is preferably designed to communicate with the host system using a signal interface, such as a USB or SATA interface, that uses substantially fewer signal lines than the IDE interface traditionally used for embedded applications. Thus, the amount of board real estate used to carry interface signals in the host system is reduced. To further reduce board real estate, the host system may include a processor that includes an integrated controller (e.g., a USB or SATA controller) corresponding to the host-subsystem signal interface. The storage subsystem may plug into, and lock to, an internal connector on a circuit board of the host system.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: March 23, 2010
    Assignee: Siliconsystems, Inc.
    Inventors: David E. Merry, Jr., Mark S. Diggs
  • Patent number: 7653778
    Abstract: A non-volatile solid-state storage subsystem, such as a non-volatile memory device, maintains usage statistics reflective of the wear state, and thus the remaining useful life, of the subsystem's memory array. A host system reads the usage statistics information, or data derived therefrom, from the subsystem to evaluate the subsystem's remaining life expectancy. The host system may use this information for various purposes, such as to (a) display or report information regarding the remaining life of the subsystem; (b) adjust the frequency with which data is written to the subsystem; and/or (c) select the type(s) of data written to the subsystem.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: January 26, 2010
    Assignee: Siliconsystems, Inc.
    Inventors: David E. Merry, Jr., Mark S. Diggs, Gary A. Drossel