Patents by Inventor David E. Schmulian

David E. Schmulian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030200520
    Abstract: Methods of designing integrated circuit gate arrays include the step of generating a netlist for a gate array integrated circuit having at least first logic and signal resources therein, directly from bitstream data which characterizes a programmable logic device having a first operational functionality and the first logic and signal resources as well. The generating step is also followed by the step of using the netlist to configure the first logic and signal resources within the gate array integrated circuit to provide the first functionality. A preferred integrated circuit design system is also provided and includes a programmable logic device having pre-programmed logic and signal resources therein and a gate array device having base logic and signal resources therein which are equivalent to the unprogrammed logic and signal resources of the programmable logic device.
    Type: Application
    Filed: August 24, 2001
    Publication date: October 23, 2003
    Inventors: Alan H. Huggins, David E. Schmulian, John MacPherson, William L. Devanney
  • Patent number: 6311316
    Abstract: Methods of designing integrated circuit gate arrays include the step of generating a netlist for a gate array integrated circuit having at least first logic and signal resources therein, directly from bitstream data which characterizes a programmable logic device having a first operational functionality and the first logic and signal resources as well. The generating step is also followed by the step of using the netlist to configure the first logic and signal resources within the gate array integrated circuit to provide the first functionality. A preferred integrated circuit design system is also provided and includes a programmable logic device having pre-programmed logic and signal resources therein and a gate array device having base logic and signal resources therein which are equivalent to the unprogrammed logic and signal resources of the programmable logic device.
    Type: Grant
    Filed: December 14, 1998
    Date of Patent: October 30, 2001
    Assignee: Clear Logic, Inc.
    Inventors: Alan H. Huggins, David E. Schmulian, John MacPherson, William L. Devanney
  • Patent number: 5949323
    Abstract: A radiant-energy configurable fuse structure and array are provided in which the fuse body of the fuse is wider than the fuse connection terminals. The fuse body can be circular or polygonal to capture more of the radiant energy from a targeting beam, which reduces the energy required to blow the fuse. As a result, unrelated circuit elements and patterned lines can be placed closer together in a laser fuse array, thereby increasing the packing density of such arrays.
    Type: Grant
    Filed: June 30, 1998
    Date of Patent: September 7, 1999
    Assignee: Clear Logic, Inc.
    Inventors: Alan H. Huggins, Ron Thomas, David E. Schmulian
  • Patent number: 4379428
    Abstract: An apparatus is provided, for use in an impact printer, in which printer it is required that an impact producing hammer, or assembly of such hammers, be operable in more than one location, whereby the hammer or assembly of hammers is moved between operational positions, the operation of the hammer or assembly of hammers is inhibited except when correctly positioned for operation, any mispositioning of the hammer or assembly of hammers is automatically corrected, wear, introduced by movement of the hammer or assembly of hammers, is minimized, and high operational speed, of the printer, is attained.
    Type: Grant
    Filed: July 11, 1980
    Date of Patent: April 12, 1983
    Assignee: Burroughs Corporation
    Inventor: David E. Schmulian