Patents by Inventor David E. Suuronen

David E. Suuronen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10825645
    Abstract: A system and method for reduced workpiece adhesion during removal from a semiconductor processing station. The system provides an electrostatic charge detector that measures the residual charge on an electrostatically clamped workpiece prior to removal from a processing station inside the semiconductor processing tool. One embodiment uses an algorithm that to predict when to remove the workpiece without electrostatic adhesion based upon the decay rate of the residual electrostatic charge (Q) on the workpiece. Other embodiments also provide for a processing station static charge buildup health check and an excessive static charge check on incoming workpieces.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: November 3, 2020
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Eric D. Wilson, David E. Suuronen, Michael W. Osborne, Julian G. Blake
  • Patent number: 10658207
    Abstract: Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a platen having different regions, where the pressure levels in the regions may be substantially equal. For example, the platen may comprise a platen body comprising first and second recesses, the first recess defining a fluid region for holding fluid for maintaining a temperature of the substrate at a desired temperature, the second recess defining a first cavity for holding a ground circuit; a first via defined in the platen body, the first via having first and second openings, the first opening proximate to the fluid region and the second opening proximate to the first cavity, wherein pressure level of the fluid region may be maintained at a level that is substantially equal to pressure level of the first cavity.
    Type: Grant
    Filed: April 16, 2018
    Date of Patent: May 19, 2020
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: David E. Suuronen, Dale K. Stone, Shigeo Oshiro, Arthur P. Riaf, Edward D. MacIntosh
  • Publication number: 20190057835
    Abstract: A system and method for reduced workpiece adhesion during removal from a semiconductor processing station. The system provides an electrostatic charge detector that measures the residual charge on an electrostatically clamped workpiece prior to removal from a processing station inside the semiconductor processing tool. One embodiment uses an algorithm that to predict when to remove the workpiece without electrostatic adhesion based upon the decay rate of the residual electrostatic charge (Q) on the workpiece. Other embodiments also provide for a processing station static charge buildup health check and an excessive static charge check on incoming workpieces.
    Type: Application
    Filed: August 7, 2018
    Publication date: February 21, 2019
    Inventors: Eric D. Wilson, David E. Suuronen, Michael W. Osborne, Julian G. Blake
  • Patent number: 10113917
    Abstract: A system and method for monitoring the temperature of a platen and a workpiece disposed on that platen is disclosed. Since the platen is a dielectric material, its properties, such as resistivity and conductivity, may change as a function of temperature. By understanding the relationship between these parameters and temperature, it may be possible to indirectly determine the temperature of the platen. For example, the platen may be in electrical communication with a power supply, which provides a clamping voltage for the workpiece. By monitoring the current waveform associated with the clamping voltage, it is possible to determine changes in the characteristics of the platen. Based on these changes, the temperature of the platen may be calculated.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: October 30, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: David E. Suuronen
  • Publication number: 20180233386
    Abstract: Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a platen having different regions, where the pressure levels in the regions may be substantially equal. For example, the platen may comprise a platen body comprising first and second recesses, the first recess defining a fluid region for holding fluid for maintaining a temperature of the substrate at a desired temperature, the second recess defining a first cavity for holding a ground circuit; a first via defined in the platen body, the first via having first and second openings, the first opening proximate to the fluid region and the second opening proximate to the first cavity, wherein pressure level of the fluid region may be maintained at a level that is substantially equal to pressure level of the first cavity.
    Type: Application
    Filed: April 16, 2018
    Publication date: August 16, 2018
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: David E. Suuronen, Dale K. Stone, Shigeo Oshiro, Arthur P. Riaf, Edward D. MacIntosh
  • Patent number: 9953849
    Abstract: Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a platen having different regions, where the pressure levels in the regions may be substantially equal. For example, the platen may comprise a platen body comprising first and second recesses, the first recess defining a fluid region for holding fluid for maintaining a temperature of the substrate at a desired temperature, the second recess defining a first cavity for holding a ground circuit; a first via defined in the platen body, the first via having first and second openings, the first opening proximate to the fluid region and the second opening proximate to the first cavity, wherein pressure level of the fluid region may be maintained at a level that is substantially equal to pressure level of the first cavity.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: April 24, 2018
    Assignee: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: David E. Suuronen, Dale K. Stone, Shigeo Oshiro, Arthur P. Riaf, Edward D. MacIntosh
  • Patent number: 9824857
    Abstract: An ion implanter may include an electrostatic clamp to hold a substrate; a plasma flood gun generating a flux of electrons impinging upon the substrate; and a controller coupled to the plasma flood gun and including a component generating a control signal responsive to a measurement signal, the control signal to adjust operation of the plasma flood gun to a target operating level. At the target operating level the flux of electrons may comprise a stabilizing dose of electrons, the stabilizing concentration of electrons, the stabilizing concentration reducing a clamp current variation in the electrostatic clamp to a target value, the target value being less than a second value of clamp current variation when the plasma flood gun is not operating.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: November 21, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Michael W. Osborne, David E. Suuronen, Julian G. Blake
  • Publication number: 20170207063
    Abstract: An ion implanter may include an electrostatic clamp to hold a substrate; a plasma flood gun generating a flux of electrons impinging upon the substrate; and a controller coupled to the plasma flood gun and including a component generating a control signal responsive to a measurement signal, the control signal to adjust operation of the plasma flood gun to a target operating level. At the target operating level the flux of electrons may comprise a stabilizing dose of electrons, the stabilizing concentration of electrons, the stabilizing concentration reducing a clamp current variation in the electrostatic clamp to a target value, the target value being less than a second value of clamp current variation when the plasma flood gun is not operating.
    Type: Application
    Filed: April 18, 2016
    Publication date: July 20, 2017
    Inventors: Michael W. Osborne, David E. Suuronen, Julian G. Blake
  • Publication number: 20170131154
    Abstract: A system and method for monitoring the temperature of a platen and a workpiece disposed on that platen is disclosed. Since the platen is a dielectric material, its properties, such as resistivity and conductivity, may change as a function of temperature. By understanding the relationship between these parameters and temperature, it may be possible to indirectly determine the temperature of the platen. For example, the platen may be in electrical communication with a power supply, which provides a clamping voltage for the workpiece. By monitoring the current waveform associated with the clamping voltage, it is possible to determine changes in the characteristics of the platen. Based on these changes, the temperature of the platen may be calculated.
    Type: Application
    Filed: November 6, 2015
    Publication date: May 11, 2017
    Inventor: David E. Suuronen
  • Patent number: 9417280
    Abstract: A system, instructions and a method of determining when an impending failure is likely to occur absent corrective action are disclosed. The system samples the output of a power supply which powers an electrostatic chuck, and determines when that output is outside acceptable limits. The output is sampled at a sufficiently high frequency so as to detect transient anomalies, which are not detectable at lower sampling rates. In some embodiments, the output is converted to a frequency spectrum. The empirical model is compared to known good reference models and, in some embodiments, failure reference models of known failure modes to determine whether an impending failure will occur, and which type of failure.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: August 16, 2016
    Assignee: Varian Semiconductor Associates, Inc.
    Inventors: David E. Suuronen, Scott E. Peitzsch
  • Publication number: 20150279704
    Abstract: Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a platen having different regions, where the pressure levels in the regions may be substantially equal. For example, the platen may comprise a platen body comprising first and second recesses, the first recess defining a fluid region for holding fluid for maintaining a temperature of the substrate at a desired temperature, the second recess defining a first cavity for holding a ground circuit; a first via defined in the platen body, the first via having first and second openings, the first opening proximate to the fluid region and the second opening proximate to the first cavity, wherein pressure level of the fluid region may be maintained at a level that is substantially equal to pressure level of the first cavity.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 1, 2015
    Inventors: David E. Suuronen, Dale K. Stone, Shigeo Oshiro, Arthur P. Riaf, Edward D. MacIntosh
  • Publication number: 20140324372
    Abstract: A system, instructions and a method of determining when an impending failure is likely to occur absent corrective action are disclosed. The system samples the output of a power supply which powers an electrostatic chuck, and determines when that output is outside acceptable limits. The output is sampled at a sufficiently high frequency so as to detect transient anomalies, which are not detectable at lower sampling rates. In some embodiments, the output is converted to a frequency spectrum. The empirical model is compared to known good reference models and, in some embodiments, failure reference models of known failure modes to determine whether an impending failure will occur, and which type of failure.
    Type: Application
    Filed: April 29, 2013
    Publication date: October 30, 2014
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: David E. Suuronen, Scott E. Peitzsch
  • Patent number: 8681472
    Abstract: Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a ground pin that extends two regions of a platen that support the substrate. The ground pin may comprise a pin body; and a sleeve comprising an upper portion, a side portion, and a lower portion, the sleeve being configured to fit around the pin body, the sleeve including a fluid channel configured to transport fluid between the upper portion and the lower portion of the sleeve.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: March 25, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: David E. Suuronen, Dale K. Stone, Shigeo Oshiro, Arthur P. Riaf, Edward D. MacIntosh
  • Patent number: 8592786
    Abstract: An ion implanter includes a platen having a clamping surface configured to support a wafer for treatment with ions, the platen also having at least one pair of electrodes under the clamping surface, a clamping power supply configured to provide an AC signal to the at least one pair of electrodes and a sensed signal representative of the AC signal, and a controller. The controller is configured to receive the sensed signal from the clamping power supply when no wafer is clamped to the clamping surface. The controller is further configured to monitor the sensed signal and determine if the sensed signal is representative of deposits on the clamping surface exceeding a predetermined deposit threshold.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 26, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: David E. Suuronen, Julian G. Blake, Kurt Decker-Lucke, James Carroll, Klaus Petry
  • Patent number: 8531814
    Abstract: An electrostatic clamp, which more effectively removes built up charge from a substrate prior to and during removal, is disclosed. Currently, the lift pins and ground pins are the only mechanisms used to remove charge from the substrate after implantation. The present discloses describes a clamp having one of more additional low resistance paths to ground. These additional conduits allow built up charge to be dissipated prior to and during the removal of the substrate from the clamp. By providing sufficient charge drainage from the backside surface of the substrate 114, the problem whereby the substrate sticks to the clamp can be reduced. This results in a corresponding reduction in substrate breakage.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: September 10, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Dale K. Stone, Lyudmila Stone, Klaus Petry, David E. Suuronen, Julian G. Blake
  • Publication number: 20110036990
    Abstract: An embossed platen to control charge accumulation includes a dielectric layer, a plurality of embossments on a surface of the dielectric layer to support a workpiece, each of a first plurality of the plurality of embossments having a conductive portion to contact a backside of the workpiece when the workpiece is in a clamped position, and a conductor to electrically couple the conductive portion of the first plurality of embossments to ground. An ion implanter having such an embossed platen is also provided.
    Type: Application
    Filed: August 12, 2009
    Publication date: February 17, 2011
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Dale K. Stone, Lyudmila Stone, Julian G. Blake, Frederick B. Ammon, David E. Suuronen
  • Publication number: 20100265631
    Abstract: An electrostatic clamp, which more effectively removes built up charge from a substrate prior to and during removal, is disclosed. Currently, the lift pins and ground pins are the only mechanisms used to remove charge from the substrate after implantation. The present discloses describes a clamp having one of more additional low resistance paths to ground. These additional conduits allow built up charge to be dissipated prior to and during the removal of the substrate from the clamp. By providing sufficient charge drainage from the backside surface of the substrate 114, the problem whereby the substrate sticks to the clamp can be reduced. This results in a corresponding reduction in substrate breakage.
    Type: Application
    Filed: April 14, 2010
    Publication date: October 21, 2010
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Dale K. Stone, Lyudmila Stone, David E. Suuronen, Klaus Petry, Julian G. Blake
  • Publication number: 20090317964
    Abstract: Techniques for reducing particle contamination on a substrate are disclosed. In one particular exemplary embodiment, the technique may be realized with a platen having different regions, where the pressure levels in the regions may be substantially equal. For example, the platen may comprise a platen body comprising first and second recesses, the first recess defining a fluid region for holding fluid for maintaining a temperature of the substrate at a desired temperature, the second recess defining a first cavity for holding a ground circuit; a first via defined in the platen body, the first via having first and second openings, the first opening proximate to the fluid region and the second opening proximate to the first cavity, wherein pressure level of the fluid region may be maintained at a level that is substantially equal to pressure level of the first cavity.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 24, 2009
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: David E. SUURONEN, Dale K. Stone, Shigeo Oshiro, Arthur P. Riaf, Edward D. MacIntosh
  • Patent number: 7595972
    Abstract: An apparatus is provided to improve clamping of a work piece to a support surface. The apparatus includes a support base, an insulator layer disposed on the support base, an electrode layer disposed on the insulator layer, and a clamping layer comprising aluminum oxynitride disposed on the electrode layer wherein the workpiece is clamped to the surface of the clamping layer. The apparatus provides a higher clamping force for the workpiece while reducing gas leakage and particle levels in addition to maintaining a declamping time suitable for high throughput processing. The apparatus may further provide a raised surface geometry or embossments on the dielectric or a dielectric comprising an outer ring a center cavity for reducing particle contamination to the backside of the workpiece.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: September 29, 2009
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Richard Muka, Paul Murphy, David E. Suuronen
  • Patent number: 5426411
    Abstract: A fuse that includes an insulative housing made from two housing pieces made of thermoplastic material, terminals extending through slots in the ends of the housing, and a fusible element having ends connected to both of the terminals.
    Type: Grant
    Filed: February 1, 1994
    Date of Patent: June 20, 1995
    Assignee: Gould Electronics Inc.
    Inventors: Robert M. Pimpis, David E. Suuronen