Abstract: Contact over active gate (COAG) structures are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures, each of the conductive trench contact structures including a trench insulating layer thereon. A remnant of a di-block-co-polymer is over a portion of the plurality of gate structures or the plurality of conductive trench contact structures. An interlayer dielectric material is over the di-block-co-polymer, over the plurality of gate structures, and over the plurality of conductive trench contact structures. An opening in the interlayer dielectric material. A conductive structure is in the opening, the conductive structure in direct contact with a corresponding one of the trench contact structures or with a corresponding one of the gate contact structures.

Abstract: In various embodiments, a user grey cell is disclosed. The user grey cell comprises a simplified logical implementation of a black box cell identified in a software and/or hardware design. The internal functionality of the black box cell is undefined, hidden, or encrypted, and thus is not available for timing analysis. The user grey cell for the black box cell provides sufficient clocking and register information to allow for accurate CDC, false path, and multi-cycle path analysis, and provides a way for designers to locate and repair clock domain crossing violations before the design is implemented in hardware. In various embodiments, a method for user grey cell analysis is disclosed. The method comprises identifying one or more black box cells in a user design. The method further comprises determining which of the input and/or output pins of each of the black box cells are in use by the user design.

Abstract: In various embodiments, a user grey cell is disclosed. The user grey cell comprises a simplified logical implementation of a black box cell identified in a software and/or hardware design. The internal functionality of the black box cell is undefined, hidden, or encrypted, and thus is not available for timing analysis. The user grey cell for the black box cell provides sufficient clocking and register information to allow for accurate CDC, false path, and multi-cycle path analysis, and provides a way for designers to locate and repair clock domain crossing violations before the design is implemented in hardware. In various embodiments, a method for user grey cell analysis is disclosed. The method comprises identifying one or more black box cells in a user design. The method further comprises determining which of the input and/or output pins of each of the black box cells are in use by the user design.

Abstract: A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into regions. Logic functions of the regions are decomposed into a directed graph of the logic functions. A swap structure is created in accordance with the directed graph to facilitate identification of input equivalences.

Abstract: A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into regions. Logic functions of the regions are decomposed into a directed graph of the logic functions. A swap structure is created in accordance with the directed graph to facilitate identification of input equivalences.

Abstract: A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into regions. Logic functions of the regions are decomposed into a directed graph of the logic functions. A swap structure is created in accordance with the directed graph to facilitate identification of input equivalences.

Abstract: At least one EDA tool is provided with first and second plurality of programming instructions. The first plurality of programming instructions are designed to determine equivalent logic in an IC design, and the second plurality of programming instructions are designed to place and route the IC design. The place and route operation includes performance of at least one place and route operation selected from a group of place and route operations consisting of choosing coupling assignments for nets and logically equivalent input pins of the IC design, and choosing coupling assignments for logically equivalent output pins and loads of the IC design.

Abstract: A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into regions. Logic functions of the regions are decomposed into a directed graph of the logic functions. A swap structure is created in accordance with the directed graph to facilitate identification of input equivalences.

Abstract: A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into fanout-free regions. Quasi-canonical forms or models of the fanout free region are created from which a swap structure is created so that pins swap groups can be identified.

Abstract: A technique for analyzing digital circuits to identify pin swaps is provided for circuit layout and similar tasks in which the circuit is first decomposed into fanout-free regions. Quasi-canonical forms or models of the fanout free region are created from which a swap structure is created so that pins swap groups can be identified.

Abstract: A water distribution system facilitates automatic corrosion control. The operator enters a set of values of parameters associated with water in the system. The system automatically and repeatedly measures the temperature and pH of the water. The system then computes a target pH for the water, according to a function which depends on the temperature and the other parameters, and on an index of corrosion. The system then varies the pH of the water, so as to minimize the deviation between the measured pH and the target pH. The system performs this process repeatedly, to maintain the desired properties of the water. In particular, the operator can easily and automatically control the water so as to make it either more corrosive or more scale-forming, in such a manner as to minimize the dissolution of lead or copper into the water while limiting the tendency of the water to form scale.

Abstract: A method and apparatus for increasing the refrigeration capacity a cooling operation that includes a mechanical refrigeration system is disclosed wherein the mechanical refrigeration system operates continuously and a cryogen is introduced into a mechanically refrigerated space only in the presence of heat load conditions that exceed the refrigeration capacity of the mechanical refrigeration system.

Abstract: The present invention is directed to an improved method for carrying out a exothermic chemical reaction with carbon dioxide in an aqueous environment. In the method, a fluid solution containing at least one chemical reactant which is exothermically reactive with carbon dioxide is provided. Liquid carbon dioxide is then injected into the solution of the chemical reactant at a pressure above the triple point of at least about 60 psig. The injection of the liquid carbon dioxide takes place under turbulent conditions wherein the liquid carbon dioxide expands to provide carbon dioxide vapor. The carbon dioxide vapor superheats to approach the exothermic reaction temperature which occurs between the carbon dioxide vapor and the chemical reactant. The chemical reactant and the carbon dioxide react in the dispersion exothermically to produce a chemical reaction product.