Patents by Inventor David E. Wohlford

David E. Wohlford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11789769
    Abstract: In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: October 17, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Muthu M. Baskaran, Thomas Henretty, M. H. Langston, Richard A. Lethin, Benoit J. Meister, Nicolas T. Vasilache, David E. Wohlford
  • Patent number: 11500621
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: November 15, 2022
    Assignee: Reservoir Labs Inc.
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Publication number: 20220004425
    Abstract: In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.
    Type: Application
    Filed: February 14, 2020
    Publication date: January 6, 2022
    Inventors: Muthu M. Baskaran, Thomas Henretty, M. H. Langston, Richard A. Lethin, Benoit J. Meister, Nicolas T. Vasilache, David E. Wohlford
  • Publication number: 20210255891
    Abstract: In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.
    Type: Application
    Filed: February 14, 2020
    Publication date: August 19, 2021
    Inventors: Thomas Henretty, Richard A. Lethin, Benoit J. Meister, Nicolas T. Vasilache, David E. Wohlford
  • Publication number: 20200278847
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Application
    Filed: May 18, 2020
    Publication date: September 3, 2020
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Patent number: 10698669
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: June 30, 2020
    Assignee: Reservoir Labs, Inc.
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Patent number: 10564949
    Abstract: In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: February 18, 2020
    Assignee: Reservoir Labs, Inc.
    Inventors: Muthu M. Baskaran, Thomas Henretty, M. H. Langston, Richard A. Lethin, Benoit J. Meister, Nicolas T. Vasilache, David E. Wohlford
  • Publication number: 20180307470
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Application
    Filed: December 11, 2017
    Publication date: October 25, 2018
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Patent number: 9858053
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: January 2, 2018
    Assignee: Reservoir Labs, Inc.
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Patent number: 9185020
    Abstract: Systems, apparatus and methods for the implementation of high-speed network analyzers are provided. A set of high-level specifications is used to define the behavior of the network analyzer emitted by a compiler. An optimized inline workflow to process regular expressions is presented without sacrificing the semantic capabilities of the processing engine. An optimized packet dispatcher implements a subset of the functions implemented by the network analyzer, providing a fast and slow path workflow used to accelerate specific processing units. Such dispatcher facility can also be used as a cache of policies, wherein if a policy is found, then packet manipulations associated with the policy can be quickly performed. An optimized method of generating DFA specifications for network signatures is also presented. The method accepts several optimization criteria, such as min-max allocations or optimal allocations based on the probability of occurrence of each signature input bit.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: November 10, 2015
    Assignee: Reservoir Labs, Inc.
    Inventors: James Ezick, Richard A. Lethin, Jordi Ros-Giralt, Peter Szilagyi, David E. Wohlford
  • Patent number: 9134976
    Abstract: In various implementations of a software analysis system, compliance checking is facilitated by analyzing different characteristics of a software system to be developed, and by comparing the information extracted from these analysis. Two or more characteristics may be expressed in different formats or languages, and the descriptions of one or more of these characteristic may be incomplete.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: September 15, 2015
    Assignee: Reservoir Labs, Inc.
    Inventors: James Ezick, Richard A. Lethin, Jonathan Springer, David E. Wohlford
  • Publication number: 20150089485
    Abstract: In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 26, 2015
    Inventors: Muthu M. Baskaran, Thomas Henretty, M. H. Langston, Richard A. Lethin, Benoit J. Meister, Nicolas T. Vasilache, David E. Wohlford
  • Patent number: 8930926
    Abstract: Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
    Type: Grant
    Filed: April 16, 2010
    Date of Patent: January 6, 2015
    Assignee: Reservoir Labs, Inc.
    Inventors: Cedric Bastoul, Richard A. Lethin, Allen K. Leung, Benoit J. Meister, Peter Szilagyi, Nicolas T. Vasilache, David E. Wohlford
  • Publication number: 20140165047
    Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
    Type: Application
    Filed: February 14, 2014
    Publication date: June 12, 2014
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, David E. Wohlford
  • Patent number: 8661422
    Abstract: Methods, apparatus and computer software product for local memory compaction are provided. In an exemplary embodiment, a processor in connection with a memory compaction module identifies inefficiencies in array references contained within in received source code, allocates a local array and maps the data from the inefficient array reference to the local array in a manner which improves the memory size requirements for storing and accessing the data. In another embodiment, a computer software product implementing a local memory compaction module is provided. In a further embodiment a computing apparatus is provided. The computing apparatus is configured to improve the efficiency of data storage in array references. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: February 25, 2014
    Assignee: Reservoir Labs, Inc.
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, Nicolas T. Vasilache, David E. Wohlford
  • Publication number: 20100281160
    Abstract: Systems, apparatus and methods for the implementation of high-speed network analyzers are provided. A set of high-level specifications is used to define the behavior of the network analyzer emitted by a compiler. An optimized inline workflow to process regular expressions is presented without sacrificing the semantic capabilities of the processing engine. An optimized packet dispatcher implements a subset of the functions implemented by the network analyzer, providing a fast and slow path workflow used to accelerate specific processing units. Such dispatcher facility can also be used as a cache of policies, wherein if a policy is found, then packet manipulations associated with the policy can be quickly performed. An optimized method of generating DFA specifications for network signatures is also presented. The method accepts several optimization criteria, such as min-max allocations or optimal allocations based on the probability of occurrence of each signature input bit.
    Type: Application
    Filed: April 29, 2010
    Publication date: November 4, 2010
    Inventors: Jordi Ros-Giralt, Peter Szilagyi, James Ezick, David E. Wohlford, Richard A. Lethin
  • Publication number: 20100218196
    Abstract: Methods, apparatus and computer software product for source code optimization are provided. In an exemplary embodiment, a first custom computing apparatus is used to optimize the execution of source code on a second computing apparatus. In this embodiment, the first custom computing apparatus contains a memory, a storage medium and at least one processor with at least one multi-stage execution unit. The second computing apparatus contains at least two multi-stage execution units that allow for parallel execution of tasks. The first custom computing apparatus optimizes the code for parallelism, locality of operations and contiguity of memory accesses on the second computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
    Type: Application
    Filed: April 16, 2010
    Publication date: August 26, 2010
    Inventors: Allen K. Leung, Benoit Meister, Nicolas T. Vasilache, David E. Wohlford, Cedric Bastoul, Peter Szilagyi, Richard A. Lethin
  • Publication number: 20100192138
    Abstract: Methods, apparatus and computer software product for local memory compaction are provided. In an exemplary embodiment, a processor in connection with a memory compaction module identifies inefficiencies in array references contained within in received source code, allocates a local array and maps the data from the inefficient array reference to the local array in a manner which improves the memory size requirements for storing and accessing the data. In another embodiment, a computer software product implementing a local memory compaction module is provided. In a further embodiment a computing apparatus is provided. The computing apparatus is configured to improve the efficiency of data storage in array references. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
    Type: Application
    Filed: February 4, 2009
    Publication date: July 29, 2010
    Inventors: Allen K. Leung, Benoit J. Meister, David E. Wohlford, Nicolas T. Vasilache, Richard A. Lethin