Patents by Inventor David Enright

David Enright has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12232264
    Abstract: In an embodiment, an apparatus and system comprising a first inductor with a first diameter; and a switched inductor including a metal layer and a switch; wherein when the switch is closed the switch connects the metal layer of the switched inductor to form an inductor with a parallel circuit enabling current to flow through the switched conductor; and wherein when the switch is open, current is not enabled to flow through the switched conductor. In another embodiment, a method for tuning a high-Q inductor, the method comprising closing a switch of a switched inductor, wherein the switch connects the switched inductor to a first inductor; wherein closing the switch enables current to flow though the switched inductor as well as the first inductor to change the inductance of the high Q inductor.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: February 18, 2025
    Assignee: ACACIA COMMUNICATIONS, INC.
    Inventors: Ian Dedic, David Enright, Darren Walker, Tarun Gupta
  • Patent number: 12107544
    Abstract: An apparatus comprising two inductors; wherein the two inductors are layered on top of each other in different layers of metal of a circuit; wherein each inductor of the inductor has a set of turns; wherein the current path of the two inductors is in the same direction.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: October 1, 2024
    Assignee: ACACIA COMMUNICATIONS, INC.
    Inventors: Ian Dedic, Gavin Allen, David Enright, Guojun Ren
  • Patent number: 11599140
    Abstract: In a first and second embodiment, an apparatus and system comprising a set of voltage controlled oscillators (VCOs); wherein each VCO of the set of VCOs has an LC tank; wherein each VCO of the set of VCOs is connected via a transmission line. In a third embodiment, a method comprising connecting each VCO in a set of VCOs by connecting each respective LC tank of each VCO of the set of VCOs with a transmission line.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: March 7, 2023
    Assignee: Acacia Communications, Inc.
    Inventors: Ian Dedic, David Enright, Tarun Gupta
  • Patent number: 11543850
    Abstract: An apparatus and system for a clock buffer. The clock buffer comprises a source follower, and the source follower comprises a voltage source and a resistor.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: January 3, 2023
    Assignee: Acacia Communications, Inc.
    Inventors: Ian Dedic, Gavin Allen, David Enright, Bo Yang, Tarun Gupta
  • Patent number: 7257382
    Abstract: The present invention is an amplifier circuit that permits variable gain control, comprising an input terminal to which a high frequency input signal is supplied; an amplifier transistor to the gate of which the high frequency input signal supplied to the input terminal is supplied and which generates an amplified signal at the drain side; and a variable attenuator provided in a signal transmission line between the input terminal and the gate of the amplifier transistor, in which a plurality of attenuation units in which an attenuation capacitor and a switch transistor are serially connected are provided in parallel between the signal transmission line and a power supply, and the attenuation ratio of which is variably controlled by controlling the conduction of the switch transistor.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: August 14, 2007
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Arai, David Enright
  • Publication number: 20050118971
    Abstract: The present invention is an amplifier circuit that permits variable gain control, comprising an input terminal to which a high frequency input signal is supplied; an amplifier transistor to the gate of which the high frequency input signal supplied to the input terminal is supplied and which generates an amplified signal at the drain side; and a variable attenuator provided in a signal transmission line between the input terminal and the gate of the amplifier transistor, in which a plurality of attenuation units in which an attenuation capacitor and a switch transistor are serially connected are provided in parallel between the signal transmission line and a power supply, and the attenuation ratio of which is variably controlled by controlling the conduction of the switch transistor.
    Type: Application
    Filed: July 23, 2004
    Publication date: June 2, 2005
    Inventors: Tomoyuki Arai, David Enright