Patents by Inventor David Eric Haglan

David Eric Haglan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250300561
    Abstract: Certain aspects of the present disclosure are directed towards a power supply circuit. The power supply circuit generally includes: a switched-mode power supply (SMPS); a detector circuit coupled to the SMPS and configured to detect a presence of one or more circuit elements of the SMPS; and a controller coupled to the detector circuit and configured to configure the SMPS to operate with a number of converter phases based on a number of the one or more circuit elements that are present.
    Type: Application
    Filed: March 20, 2024
    Publication date: September 25, 2025
    Inventors: David Eric HAGLAN, Gordon LEE
  • Publication number: 20210157349
    Abstract: A low-dropout (LDO) regulator and an associated method and apparatus are described. The LDO regulator generally includes a first transistor coupled between an input voltage node and an output voltage node of the LDO regulator. The LDO regulator further includes a first amplifier having an output coupled to a gate of the first transistor, wherein a feedback path couples the output voltage node to an input of the first amplifier. The LDO regulator further includes a second amplifier having an output coupled to an enable input of the first amplifier, wherein a voltage-sensing path couples the input voltage node to an input of the second amplifier. The LDO regulator further includes and a second transistor coupled between the gate of the first transistor and a reference potential node, the output of the second amplifier being coupled to a gate of the second transistor.
    Type: Application
    Filed: November 26, 2019
    Publication date: May 27, 2021
    Inventors: Shamim AHMED, David Eric HAGLAN
  • Patent number: 11003201
    Abstract: A low-dropout (LDO) regulator and an associated method and apparatus are described. The LDO regulator generally includes a first transistor coupled between an input voltage node and an output voltage node of the LDO regulator. The LDO regulator further includes a first amplifier having an output coupled to a gate of the first transistor, wherein a feedback path couples the output voltage node to an input of the first amplifier. The LDO regulator further includes a second amplifier having an output coupled to an enable input of the first amplifier, wherein a voltage-sensing path couples the input voltage node to an input of the second amplifier. The LDO regulator further includes and a second transistor coupled between the gate of the first transistor and a reference potential node, the output of the second amplifier being coupled to a gate of the second transistor.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: May 11, 2021
    Assignee: QUALCOMM INCORPORATED
    Inventors: Shamim Ahmed, David Eric Haglan