Patents by Inventor David F. Collins

David F. Collins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5514979
    Abstract: Disclosed is a bus driver circuit that dynamically clamps the bus voltage for a predetermined period following a transition of the bus voltage, thereby reducing overshoot and ringing. The disclosed circuit dynamically clamps the initial overshoot at approximately the bus terminating voltage VT. The clamping is dynamic in that it is active for only a limited, prescribed period, which is adjustable. In a preferred embodiment, a driver receives an input signal (VIN) and provides an OUTPUT signal to a bus terminated with a terminating voltage (VT). A clamp circuit receives a CLAMP GATE signal and sinks current from the OUTPUT signal, thus reducing ringing and overshoot of the output signal. A delay circuit disables the clamp after a prescribed delay following a transition of the OUTPUT signal.
    Type: Grant
    Filed: November 28, 1994
    Date of Patent: May 7, 1996
    Assignee: Unisys Corporation
    Inventors: David F. Collins, Brian C. Lacey
  • Patent number: 5506521
    Abstract: A series-gated ECL driver, such as a series-gated ECL cut-off driver, is provided with settable output rise time and settable output fall time, in order to reduce noise at the output of the driver while limiting the delay resulting from such noise reduction. A method is also provided for so controlling an ECL driver. The driver includes at least two current switches fed by a current source. Each current switch includes a NOR side including one or more transistors, and an OR side including one or more transistors. The input to the NOR side of one such current switch can be buffered with an input emitter follower, and the output from that current switch can be buffered with an output emitter follower. A capacitance is connected across the one current switch and the current source, that is between the collector(s) and emitter(s) of the NOR side transistor(s) of that current switch, and the input side of the current source.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: April 9, 1996
    Assignee: Unisys Corporation
    Inventor: David F. Collins
  • Patent number: 5485107
    Abstract: Disclosed is a backplane driver circuit 14' that temporarily clamps its output (PAD) to the termination supply voltage (V.sub.term) during a low to high transition. This termination is applied for a limited period of time determined by the delay through an inverter 14'-15 and a transfer gate 14'-11. This circuit is effective in reducing both the inductive effects of quickly turning the driver off and reflections due to the backplane stubs (L1-L8). Another feature of the driver circuit is that the driver can be plugged into or pulled out of a running system for maintenance without turning the system off. In order to accomplish this, the driver goes into a high impedance state when its supply voltage is turned off.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: January 16, 1996
    Assignee: Unisys Corporation
    Inventors: Brian C. Lacey, David F. Collins
  • Patent number: 5321320
    Abstract: An ECL driver, such as an ECL cut-off driver, is provided with settable output rise time and settable output fall time, in order to reduce noise at the output of the driver while limiting the delay resulting from such noise reduction. A method is also provided for so controlling an ECL driver. The driver includes a current switch and a current source. The current switch includes a NOR side including one or more transistors, and an OR side including one or more transistors. The input to the NOR side can be buffered with an input emitter follower, and the output from the current switch can be buffered with an output emitter follower. A capacitance is connected across the collector(s) and emitter(s) of the NOR side transistor(s) of the current switch, and a capacitance is connected at one electrode both to the collector(s) of the OR side transistor(s) and to the base(s) of the output emitter follower transistor(s).
    Type: Grant
    Filed: August 3, 1992
    Date of Patent: June 14, 1994
    Assignee: Unisys Corporation
    Inventor: David F. Collins