Patents by Inventor David G. Bedrosian

David G. Bedrosian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Analysis mechanism for system performance simulator
    Patent number: 5548539
    Abstract: An analysis mechanism is intended for use in a system performance simulator which includes a core simulator and which is intended for simulating the performance of a physical, real-world system, and which operates with a hardware description language. The hardware description language includes representations of physical, real-world devices in the form of a template set, wherein each template in the set includes an extraction mechanism for extracting indicators of system quality from the core simulator for each template, as the simulation progresses, or after simulation is complete. Additionally, a display interface is provided for displaying the system performance indicators of design quality to a designer, either during or after the simulation.
    Type: Grant
    Filed: November 5, 1993
    Date of Patent: August 20, 1996
    Assignee: Analogy, Inc.
    Inventors: Martin Vlach, Ernst Christen, Darrell A. Teegarden, David G. Bedrosian