Abstract: A central processing unit (CPU) repeatedly interrupts execution of software to save the CPU state, i.e. contents of various storage elements internal to the CPU, until an error occurs during the execution. On occurrence of the error, the CPU once again saves state and only then passes control to a handler in the software for handling the error. The state saving steps can be implemented in a computer process by use of a timer interrupt or by use of system management, or ICE breakpoint instructions that are included in the x86 instruction set. Errors can be debugged off-line in a development system, for example, by use of an in-circuit emulator to load the saved CPU states sequentially into the development system, thereby to recreate the error condition. Errors can also be debugged proactively, even before the error occurs, by use of a number of known-to-be-erroneous instructions and corresponding fix instructions.

Abstract: A central processing unit (CPU) repeatedly interrupts execution of software to save the CPU state, i.e. contents of various storage elements internal to the CPU, until an error occurs during the execution. On occurrence of the error, the CPU once again saves state and only then passes control to a handler in the software for handling the error. The state saving steps can be implemented in a computer process by use of a timer interrupt or by use of system management, or ICE breakpoint instructions that are included in the x86 instruction set. Errors can be debugged off-line in a development system, for example, by use of an in-circuit emulator to load the saved CPU states sequentially into the development system, thereby to recreate the error condition. Errors can also be debugged proactively, even before the error occurs, by use of a number of known-to-be-erroneous instructions and corresponding fix instructions.

Abstract: A central processing unit (hereinafter "CPU") has a number of functional units and a tuning port for modifying one or more parameters of the functional units (hereinafter "tunable units"). The combination (also called a "tuning assembly") formed by a tuning port and the tunable units allows a CPU to be fine tuned, i.e. take on different configuration profiles (as defined by the tunable units' parameters) for efficiently executing different application programs. Therefore, a CPU that includes a tuning assembly as described herein can take on a first configuration profile capable of most efficiently executing a first application program such as a computer game, and can take on a second configuration profile capable of most efficiently executing a second application program such as a spreadsheet and so on. The CPU's configuration profile can be changed even during the execution of an application program by changing the tunable units' parameters.

Abstract: A microprocessor with automatic and dynamic partname determination including performance number. The microprocessor includes circuitry that measures a core clock frequency for the microprocessor and circuitry that determines a performance indication for the microprocessor in response to the measured core clock frequency.

Abstract: A computer process transforms a "general purpose" central processing unit (hereinafter "CPU") into one of a number of possible "special purpose" CPUs by changing operation of circuitry in the CPU. Changing operation of CPU circuitry as described herein "fine tunes" behavior of the CPU, e.g. provides resources and environment most suitable for execution of a specific application program, or even a portion of an application program. The computer process performs the steps of: checking whether the CPU has a tunable unit, waiting for a triggering event indicating a need for fine tuning, reading one or more statistics on the performance of the CPU, comparing the read statistics with corresponding predetermined statistics, determining a multi-valued parameter signal depending on the comparison, driving the determined parameter signal to the tunable unit and changing operation of circuitry in the tunable unit depending on the received parameter signal, thereby to fine tune operation of the tunable unit and the CPU.