Abstract: Memory component temperature information is used to implement a method for ODT (on die termination) thermal load management. A respective temperature of a plurality of memory components are accessed, and based on this temperature, an ODT cycle is directed to a first of the memory components to avoid imposing a thermal load from the ODT cycle on a second of the memory components.

Abstract: Memory component temperature information is used to implement a method for ODT (on die termination) thermal load management. A respective temperature of a plurality of memory components are accessed, and based on this temperature, an ODT cycle is directed to a first of the memory components to avoid imposing a thermal load from the ODT cycle on a second of the memory components.

Abstract: A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component.

Abstract: Circuits, apparatus, and methods for avoiding deadlock conditions in a bus fabric. One exemplary embodiment provides an address decoder for determining whether a received posted request is a peer-to-peer request. If it is, the posted request is sent as a non-posted request. A limit on the number of pending non-posted requests is maintained and not exceed, such that deadlock is avoided. Another exemplary embodiment provides an arbiter that tracks a number of pending posted requests. When the number pending posted requests reaches a predetermined or programmable level, a Block Peer-to-Peer signal is sent to the arbiter's clients, again avoiding deadlock.

Abstract: A method and system for implementing a generalized system stutter are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of blocking a first request received from a first of a plurality of bus masters during a low power state of a computing device for as long as permissible by the timing requirements of the computing device, wherein the first request is capable of triggering the computing device to transition out of the low power state, and during an active state of the computing device, servicing the first request along with other pending requests from the rest of the plurality of bus masters before the computing device transitions back to the low power state.

Abstract: Circuits, apparatus, and methods for avoiding deadlock conditions in a bus fabric. One exemplary embodiment provides an address decoder for determining whether a received posted request is a peer-to-peer request. If it is, the posted request is sent as a non-posted request. A limit on the number of pending non-posted requests is maintained and not exceed, such that deadlock is avoided. Another exemplary embodiment provides an arbiter that tracks a number of pending posted requests. When the number pending posted requests reaches a predetermined or programmable level, a Block Peer-to-Peer signal is sent to the arbiter's clients, again avoiding deadlock.

Abstract: A walker is disclosed having two sets of handles positioned for rising from and lowering to a seated position in addition to serving as a walking aid. The walker comprises a frame having a front section comprising a pair of front vertical supports and a rigid cross-piece, and two side sections each comprising a rear vertical support having a load-bearing axis formed through a ground-engaging point, rigid connectors connecting the side sections to the front section, a first pair of handles positioned to support a user in a standing or walking position, and a second pair of handles positioned below and to the rear of the first set of handles to support a user in rising from or lowering to a seated position, in which the geometric centers of each of the second pair of handles is positioned to the rear of the load-bearing axis of each of the rear vertical supports.

Abstract: Circuits, apparatus, and methods for avoiding deadlock conditions in a bus fabric. One exemplary embodiment provides an address decoder for determining whether a received posted request is a peer-to-peer request. If it is, the posted request is sent as a non-posted request. A limit on the number of pending non-posted requests is maintained and not exceed, such that deadlock is avoided. Another exemplary embodiment provides an arbiter that tracks a number of pending posted requests. When the number pending posted requests reaches a predetermined or programmable level, a Block Peer-to-Peer signal is sent to the arbiter's clients, again avoiding deadlock.

Abstract: A bridge associated with a broadcast aperture facilitates the transfer of rendering commands and data between a processor and multiple graphics devices. The bridge receives data written by the processor to the broadcast aperture and forwards it to multiple graphics devices, eliminating the need for the processor to perform duplicative(?) write operations. During system initialization, a broadcast aperture is allocated to the bridge in address space based on an aperture size value set using a system configuration utility and stored in system configuration memory. A graphics driver activates the broadcast aperture by sending unicast aperture parameters associated with the multiple graphics devices to the bridge via a bridge driver. Upon activating the broadcast aperture, multiple graphics devices can be operated in parallel to improve rendering performance. Parallel rendering techniques include split-frame, alternate frame, and combined split- and alternate frame rendering.

Abstract: A system, apparatus, and method are disclosed for increasing the physical memory size accessible to a processor, at least in part, by reclaiming physical address space typically associated with addresses of a restricted linear address space (i.e., addresses that are otherwise unusable by the processor as system memory). In one embodiment, an exemplary memory controller redirects a linear address associated with a range of addresses to access a reclaimed memory hole. The memory controller includes an address translator configured to determine an amount of restricted addresses and to establish a baseline address identified as a first number being a first integer power of 2. The range of addresses can be located at another address identified as a second number being a second integer power of 2. As such, the address translator translates the linear address into a translated address associated with the reclaimed memory hole based on the baseline address.

Abstract: A system, apparatus, and method are disclosed for controlling accesses into memory to minimize sequential accesses to the same bank of memory, at least in part, by characterizing a subset of an address in parallel with address translations associated with those accesses. In one embodiment, an exemplary memory controller can include an address translator configured to translate an address useable by a processor to a first memory address. Also, the memory controller includes a bit characterizer configured to characterize a subset of the address as having a value from a range of values, and a bank separator coupled to the address translator and the bit characterizer for receiving a first portion of the first memory address and the value, respectively. Accordingly, the bank separator is configured to differentiate the first portion from a second portion of a second memory address.

Abstract: A system, apparatus, and method are disclosed for increasing the physical memory address space accessible to a processor, at least in part, by translating linear addresses associated with a memory hole into a subset of physical memory addresses that otherwise is inaccessible as system memory by a processor. In one embodiment, a memory controller reclaims memory holes in a system memory divided into ranges of linear addresses, where the system memory includes a number of arbitrarily-sized memory devices. The memory controller includes a memory configuration evaluator configured to determine a translated memory hole size for a memory hole, the memory hole including restricted linear addresses that translate into a subset of physical addresses. Also, memory configuration evaluator can be configured to form adjusted ranges to translate at least one linear address into a subset of physical addresses. As such, the system memory increases by at least the subset of physical addresses.

Abstract: A method and system for memory temperature measurement. The method includes the step of monitoring a plurality of accesses to a memory component. A number of accesses occurring to the memory component over a time period is determined. A temperature of the memory component is determined based on the number of accesses occurring over the time period.

Abstract: Methods and apparatus for changing the timing of memory requests in a graphics system. Reading data from memory in a graphics system causes ground bounce and other electrical noise. The resulting ground bounce may be undesirably synchronized with a video retrace signal sent to a display, and may therefore cause visible artifacts. Embodiments of the present invention shift requests made by one or more clients by a duration or durations that vary with time, thereby changing the timing of the data reads from memory. The requests may be shifted by a different duration for each memory request, for each frame, or multiples of requests or frames. The durations may be random, pseudo-random, or determined by another algorithm, and they may advance or delay the requests. By making the ground bounce and other noise asynchronous with the video retrace signal, these artifacts are reduced or eliminated.

Abstract: A hand-held, electrically-powered pool cleaner includes a body and a nozzle for suctioning pool water. The body has a filter, an impeller and motor, rechargeable batteries, and a handle for carrying the body and for maneuvering the nozzle along a surface being cleaned the surface. The impeller draws pool water through the nozzle and the filter to remove debris water. A filter housing disposed between the nozzle and the body accumulates the filtered debris. The body optionally includes a pole attachment member to receive the free end of a pole for maneuvering the cleaner from outside of the pool.

Abstract: A bus interface unit is adapted to receive transaction requests for at least two different targets. The bus interface unit monitors a capacity of a resource associated with servicing transaction requests to the targets, such as a posted write buffer. If a transaction request would fill the resource beyond a current remaining capacity of the resource such that the execution of other pipelined transactions would become stalled, the bus interface generates a retry response so that the request is retried at a later time, permitting other transactions to proceed while the resource drains.

Abstract: A tool for manipulating a fiber optic connector includes a handle portion having a first major axis and first and second ends. An intermediate support arm having a second major axis extends from the first end of the handle portion. First and second jaws extend from the intermediate support arm. Each jaw extends generally perpendicular to the second major axis of its respective intermediate support arm and generally orthogonal to the first major axis. Each jaw includes a gripping portion having a generally concave shape configured to complementarily receive a portion of the fiber optic connector. Movement of the handle portion moves the jaws between an open position in which the jaws are spaced apart for loosely receiving a fiber optic connector, and a closed position in which the jaws securely grip the fiber optic connector.

Abstract: A hatch cover for deployment over a hatchway formed in a floating roof liquid storage tank permits rapid loading and unloading of inspection or maintenance equipment and minimizes vapor emissions from the tank. The portable hatch cover has two base plates movably connected at a hinge and each defining complementary recesses. A circular flange extends from the bottom surfaces of the base plates to seat the hatch cover in the hatchway. Two door panels are movably connected at hinges to the top surfaces of the base plates. When one or both of the door panels are opened, equipment may be loaded into the tank through the complementary recesses. When closed, the door panels cover the recesses in the base plates. Complementary notches in the door panels provide an opening through which equipment tubing or wiring may extend when the door panels are closed. A collar gasket optionally may be wrapped around the tubing or wiring as a further means to limit vapor emissions from the tank.

Abstract: A helical needle is attached to a surgical probe to aid in the insertion of the probe into a tissue mass. The tip of the helical needle penetrates the tissue mass in advance of the tip of the probe. The probe is rotated to push the helical shaft of the needle into the tissue mass in the direction of rotation. As the helical shaft advances into the tissue mass, the probe advances with it. Rotating the probe in the opposite direction causes the helical needle and probe to withdraw from the tissue mass. Rotation of the probe and needle is more effective in penetrating rubbery and calcified growths than the conventional method of pushing the probe, and it enables the precise placement of the probe. The helical needle also enables insertion of the probe in situations where an inconvenient angle of entry makes it difficult to push the probe along.