Abstract: Antibodies that bind the tumor (T) antigen of the Merkel cell polyomavirus are disclosed. The antibodies can be use used in cell-based immunotherapies, antibody-based therapies, diagnostics, and detection assays, among other uses.

Abstract: The invention provides a method of detecting a subject suffering from, or at risk of suffering from, bladder cancer the method comprising i) providing a body fluid sample isolated from a subject; ii) isolating cells from said sample to provide a cell sample; iii) contacting the sample with a specific binding member capable of binding to a minichromosome maintenance (MCM) polypeptide(s); iv) determining the binding of said specific binding member to the cell sample; v) counting those cells in said cell sample which bound to said specific binding member to provide a cell count; vi) determining, based on the cell count, whether the subject has, or is at risk of having, bladder cancer.

Abstract: The present invention relates to a method of diagnosis which identifies one or more individual cells and comprises determining at least one of a cell dimension and a cell area, and determining at least one of dark/light cell contrast characteristics, cell area characteristics, cell color characteristics, cell roughness characteristics, distances between cell nuclei and cell convexity. A computer readable medium, a computer apparatus and a diagnostic system is also provided.

Abstract: The invention provides a method of detecting a subject suffering from, or at risk of suffering from, bladder cancer the method comprising i) providing a body fluid sample isolated from a subject; ii) isolating cells from said sample to provide a cell sample; iii) contacting the sample with a specific binding member capable of binding to a minichromosome maintenance (MCM) polypeptide(s); iv) determining the binding of said specific binding member to the cell sample; v) counting those cells in said cell sample which bound to said specific binding member to provide a cell count; vi) determining, based on the cell count, whether the subject has, or is at risk of having, bladder cancer.

Abstract: The invention provides a method of detecting a subject suffering from, or at risk of suffering from, bladder cancer the method comprising i) providing a body fluid sample isolated from a subject; ii) isolating cells from said sample to provide a cell sample; iii) contacting the sample with a specific binding member capable of binding to a minichromosome maintenance (MCM) polypeptide(s); iv) determining the binding of said specific binding member to the cell sample; v) counting those cells in said cell sample which bound to said specific binding member to provide a cell count; vi) determining, based on the cell count, whether the subject has, or is at risk of having, bladder cancer.

Abstract: An integrated circuit may have pipelined programmable interconnects that are configured to select between a routing signal stored in a register and the identical routing signal bypassing the register. The pipelined programmable interconnect may send the selected routing signal over a wire to the next pipelined programmable interconnect circuitry. The integrated circuit may also have clock routing circuitry to select respective clock signals for the registers in the different pipelined programmable interconnects. The clock routing circuitry may include first interconnects that convey region clocks, second interconnects that conveys routing clocks, a first selector circuit to select routing clocks among the region clocks, and a second selector circuit to select routing clocks for the respective registers.

Abstract: A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic design and cyclic logic paths within the user logic design, assigning the cyclic logic paths to logic in a first portion of the programmable integrated circuit device that operates at a first data rate, assigning the unidirectional logic paths to logic in a second portion of the programmable integrated circuit device that operates at a second data rate lower than the first data rate, and pipelining the unidirectional data paths in the second portion of the programmable integrated circuit device to compensate for the lower second data rate. A programmable integrated circuit device adapted to carry out such method may have logic regions operating at different rates, including logic regions with programmably selectable data rates.

Abstract: An integrated circuit may have pipelined programmable interconnects that are configured to select between a routing signal stored in a register and the identical routing signal bypassing the register. The pipelined programmable interconnect may send the selected routing signal over a wire to the next pipelined programmable interconnect circuitry. The integrated circuit may also have clock routing circuitry to select respective clock signals for the registers in the different pipelined programmable interconnects. The clock routing circuitry may include first interconnects that convey region clocks, second interconnects that conveys routing clocks, a first selector circuit to select routing clocks among the region clocks, and a second selector circuit to select routing clocks for the respective registers.

Abstract: The present invention relates to a method of diagnosis which identifies one or more individual cells and comprises determining at least one of a cell dimension and a cell area, and determining at least one of dark/light cell contrast characteristics, cell area characteristics, cell colour characteristics, cell roughness characteristics, distances between cell nuclei and cell convexity. A computer readable medium, a computer apparatus and a diagnostic system is also provided.

Abstract: Embodiments are disclosed that relate to interacting with a user interface via feedback provided by an avatar. One embodiment provides a method comprising receiving depth data, locating a person in the depth data, and mapping a physical space in front of the person to a screen space of a display device. The method further comprises forming an image of an avatar representing the person, outputting to a display an image of a user interface comprising an interactive user interface control, and outputting to the display device the image of the avatar such that the avatar faces the user interface control. The method further comprises detecting a motion of the person via the depth data, forming an animated representation of the avatar interacting with the user interface control based upon the motion of the person, and outputting the animated representation of the avatar interacting with the control.

Abstract: A logic device includes a low-skew network that feeds a subset of elements on the logic device. The low-skew network includes a selector that can select from a plurality of signal sources which includes a first signal source and a second signal source, wherein the second signal source can reach at least one element outside of the subset.

Abstract: One embodiment relates to a circuit for pipelined direct-drive routing, the circuit including a routing multiplexer, a flip-flop, and a mode multiplexer. The output of the routing multiplexer is coupled to an input of the mode multiplexer and to the flip-flop. The output of the flip-flop is connected to another input of the mode multiplexer. The flip-flop may be directly connected to the routing multiplexer and the mode multiplexer, or, in an alternate embodiment, the flip-flop may be a member of a pipeline register pool. Another embodiment relates to a circuit for pipelined direct-drive routing which uses a pulse latch. Other embodiments relate to method for pipelined direct-drive routing which includes a degree of logical separation between logic elements and flip-flop elements. Another embodiment relates to a logic array block. Other embodiments, aspects, and features are also disclosed.

Abstract: An integrated circuit may have pipelined programmable interconnects that are configured to select between a routing signal stored in a register and the identical routing signal bypassing the register. The pipelined programmable interconnect may send the selected routing signal over a wire to the next pipelined programmable interconnect circuitry. The integrated circuit may also have clock routing circuitry to select respective clock signals for the registers in the different pipelined programmable interconnects. The clock routing circuitry may include first interconnects that convey region clocks, second interconnects that conveys routing clocks, a first selector circuit to select routing clocks among the region clocks, and a second selector circuit to select routing clocks for the respective registers.

Abstract: A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic design and cyclic logic paths within the user logic design, assigning the cyclic logic paths to logic in a first portion of the programmable integrated circuit device that operates at a first data rate, assigning the unidirectional logic paths to logic in a second portion of the programmable integrated circuit device that operates at a second data rate lower than the first data rate, and pipelining the unidirectional data paths in the second portion of the programmable integrated circuit device to compensate for the lower second data rate. A programmable integrated circuit device adapted to carry out such method may have logic regions operating at different rates, including logic regions with programmably selectable data rates.

Abstract: One embodiment relates to a circuit for pipelined direct-drive routing, the circuit including a routing multiplexer, a flip-flop, and a mode multiplexer. The output of the routing multiplexer is coupled to an input of the mode multiplexer and to the flip-flop. The output of the flip-flop is connected to another input of the mode multiplexer. The flip-flop may be directly connected to the routing multiplexer and the mode multiplexer, or, in an alternate embodiment, the flip-flop may be a member of a pipeline register pool. Another embodiment relates to a circuit for pipelined direct-drive routing which uses a pulse latch. Other embodiments relate to method for pipelined direct-drive routing which includes a degree of logical separation between logic elements and flip-flop elements. Another embodiment relates to a logic array block. Other embodiments, aspects, and features are also disclosed.

Abstract: The present invention relates to a method of diagnosis which identifies one or more individual cells and comprises determining at least one of a cell dimension and a cell area, and determining at least one of dark/light cell contrast characteristics, cell area characteristics, cell colour characteristics, cell roughness characteristics, distances between cell nuclei and cell convexity. A computer readable medium, a computer apparatus and a diagnostic system is also provided.

Abstract: A method of configuring a programmable integrated circuit device with a user logic design includes analyzing the user logic design to identify unidirectional logic paths within the user logic design and cyclic logic paths within the user logic design, assigning the cyclic logic paths to logic in a first portion of the programmable integrated circuit device that operates at a first data rate, assigning the unidirectional logic paths to logic in a second portion of the programmable integrated circuit device that operates at a second data rate lower than the first data rate, and pipelining the unidirectional data paths in the second portion of the programmable integrated circuit device to compensate for the lower second data rate. A programmable integrated circuit device adapted to carry out such method may have logic regions operating at different rates, including logic regions with programmably selectable data rates.

Abstract: A computer-implemented method and program product for estimating cost and/or time requirements for migrating an application from one platform to another. The method includes receiving identifications for tasks, receiving at least one assessment type selected for estimating cost and/or time requirement for migration, where the assessment type delineates a degree of accuracy for estimating the cost and/or time requirement for migration, correlating base costs and/or time requirements to the tasks identified, receiving identifications of attributes that affect base costs and/or time requirements, correlating cost and/or time factors to the tasks, a respective cost factor and/or time factor indicating an amount by which an attribute affects the respective base cost and/or time requirement for a task, and estimating cost and/or time requirements for each task, by applying the respective cost and/or time factors for each task to the respective base cost and/or base time requirements for each task.

Abstract: Embodiments are disclosed that relate to interacting with a user interface via feedback provided by an avatar. One embodiment provides a method comprising receiving depth data, locating a person in the depth data, and mapping a physical space in front of the person to a screen space of a display device. The method further comprises forming an image of an avatar representing the person, outputting to a display an image of a user interface comprising an interactive user interface control, and outputting to the display device the image of the avatar such that the avatar faces the user interface control. The method further comprises detecting a motion of the person via the depth data, forming an animated representation of the avatar interacting with the user interface control based upon the motion of the person, and outputting the animated representation of the avatar interacting with the control.

Abstract: A method of configuring a programmable integrated circuit device with a user logic design includes accepting a first user input defining the user logic design, accepting a second user input defining latency characteristics of the user logic design, determining a configuration of the programmable integrated circuit device having the user logic design, and retiming the configuration based on the second user input.