Abstract: A method and apparatus for bridging network protocols is disclosed. In one embodiment, a data frame is received and stored in a dual-port memory queue by hardware logic. An embedded processor is notified of the data frame once a programmable number of bytes of the data frame have been received and stored. Once notified, the embedded processor may then undertake to read the data frame from the memory queue while the hardware logic is still writing to the memory queue. In one embodiment, the processor may then translate the data frame's protocol and begin transmitting it out over a network connection, all while the data frame's payload is still being received.

Abstract: Systems, methods, and other embodiments associated with a unified hybrid input/output adapter are described. According to one embodiment, an apparatus includes an Input/Output (I/O) interconnect configured to connect with a host device and to provide communications with the host device. The apparatus also includes a network adapter connected to the I/O interconnect and configured to communicate with a network storage. The apparatus includes a host adapter connected to the I/O interconnect and configured to communicate with a first storage device and a second storage device. The first storage device has a higher latency than the second storage device. The apparatus further includes a storage logic configured to control the I/O interconnect to cause storage access requests from the host device to be cached in the second storage device via the host adapter.

Abstract: The disclosure provides a hardware architecture for encryption and decryption device. The hardware architecture can improve the encryption and decryption data rate by using parallel processing, and pipeline operation. Further, the hardware architecture can save footprint by sharing hardware components. Additionally, the hardware architecture can be associated with a memory to protect the information stored at the memory.

Abstract: Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fiber Channel device to a storage processor on a packet-over-SONET network.

Abstract: A method and apparatus for bridging network protocols is disclosed. In one embodiment, a data frame is received and stored in a dual-port memory queue by hardware logic. An embedded processor is notified of the data frame once a programmable number of bytes of the data frame have been received and stored. Once notified, the embedded processor may then undertake to read the data frame from the memory queue while the hardware logic is still writing to the memory queue. In one embodiment, the processor may then translate the data frame's protocol and begin transmitting it out over a network connection, all while the data frame's payload is still being received.

Abstract: Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fibre Channel device to a storage processor on a packet-over-SONET network.

Abstract: A method and apparatus for bridging network protocols is disclosed. In one embodiment, a data frame is received and stored in a dual-port memory queue by hardware logic. An embedded processor is notified of the data frame once a programmable number of bytes of the data frame have been received and stored. Once notified, the embedded processor may then undertake to read the data frame from the memory queue while the hardware logic is still writing to the memory queue. In one embodiment, the processor may then translate the data frame's protocol and begin transmitting it out over a network connection, all while the data frame's payload is still being received.

Abstract: Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fibre Channel device to a storage processor on a packet-over-SONET network.

Abstract: Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fibre Channel device to a storage processor on a packet-over-SONET network.

Abstract: Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fiber Channel device to a storage processor on a packet-over-SONET network.

Abstract: A method and apparatus for bridging network protocols is disclosed. In one embodiment, a data frame is received and stored in a dual-port memory queue by hardware logic. An embedded processor is notified of the data frame once a programmable number of bytes of the data frame have been received and stored. Once notified, the embedded processor may then undertake to read the data frame from the memory queue while the hardware logic is still writing to the memory queue. In one embodiment, the processor may then translate the data frame's protocol and begin transmitting it out over a network connection, all while the data frame's payload is still being received.

Abstract: A method and apparatus for processing data frames using a networking device is disclosed. In one embodiment, a packet-over-SONET (POS) frame containing an encapsulated Fibre Channel frame is received by a protocol bridge. The POS header may then be stripped off and placed into a queue, while the encapsulated raw FC frame may be placed into a buffer of the protocol bridge. Hardware logic may then be used to generate and transmit a Fibre Channel frame using the previously encapsulated raw FC frame from the buffer. In another embodiment, a raw Fibre Channel data frame by the protocol bridge and then encapsulated into a POS frame and sent out on a POS interface. In one embodiment, this process may be carried in either a raw frame mode or an interleaved mode.

Abstract: A method and apparatus for bridging network protocols is disclosed. In one embodiment, a data frame is received and stored in a dual-port memory queue by hardware logic. An embedded processor is notified of the data frame once a programmable number of bytes of the data frame have been received and stored. Once notified, the embedded processor may then undertake to read the data frame from the memory queue while the hardware logic is still writing to the memory queue. In one embodiment, the processor may then translate the data frame's protocol and begin transmitting it out over a network connection, all while the data frame's payload is still being received.

Abstract: A method and apparatus for bridging network protocols is disclosed. In one embodiment, a data frame is received and stored in a dual-port memory queue by hardware logic. An embedded processor is notified of the data frame once a programmable number of bytes of the data frame have been received and stored. Once notified, the embedded processor may then undertake to read the data frame from the memory queue while the hardware logic is still writing to the memory queue. In one embodiment, the processor may then translate the data frame's protocol and begin transmitting it out over a network connection, all while the data frame's payload is still being received.

Abstract: Methods and apparatus for bridging network protocols are disclosed. A protocol bridge may be used to function as a target for a network processor while performing a target mode operation, while functioning as an initiator on behalf of the network processor while performing an initiator mode operation. In one embodiment, the protocol bridge determines the mode of operation based on information in a received frame's header. In another embodiment, the protocol bridge couples a Fibre Channel device to a storage processor on a packet-over-SONET network.

Abstract: A method and apparatus for controlling information flow through a protocol bridge is disclosed. In one embodiment, circular queues in dual port memory are used for passing frame header information and control information between the hardware and a processor. In one embodiment, a ‘control bit’ in each element in the dual port memory serves as a signaling mechanism for passing control of the circular queue elements between the hardware and the software. In another embodiment, a ‘skip bit’ is used to simplify error handling by enabling the circular queue elements to be processed in a particular order even under error conditions.