Abstract: The claimed subject matter relates to an architecture that can actively regulate associated gateways in connection with lossless application-level compression. In particular, the architecture can monitor a flow of messages that enter and/or traverse a gateway in order to determine a bandwidth utilization of an associated network due to the messages. The architecture can also monitor the aggregate messages load for the associated network due to all gateways. In particular, the architecture can regulate lossless application-level compression at that gateway or all of the gateways in the set as a function of the bandwidth utilization and/or the aggregate message load. Accordingly, compression features can be activated or deactivated based upon a utilization threshold parameter, and gateways can be regulated uniformly or independently from one another.

Abstract: The claimed subject matter relates to an architecture that can provide substantially lossless compression and subsequent decompression of messages at an application level. In particular, the architecture, in one aspect thereof, can receive a set of messages. When application data for received messages does not match stored message, the message can be stored to a buffer. In contrast, if application data matches that for a stored message, the received message can be discarded and a message count incremented. The compressed message pattern can include the stored message and the message count. Upon decompression, the number of messages received can be identified by the message count and the application data can be readily recreated for all messages by copying that data. Non-application data, such as time stamp information can be reconstructed based upon a buffer period, other timing offset data, or other data fields included in the message pattern.

Abstract: The claimed subject matter relates to an architecture that can actively regulate associated gateways in connection with lossless application-level compression. In particular, the architecture can monitor a flow of messages that enter and/or traverse a gateway in order to determine a bandwidth utilization of an associated network due to the messages. The architecture can also monitor the aggregate messages load for the associated network due to all gateways. In particular, the architecture can regulate lossless application-level compression at that gateway or all of the gateways in the set as a function of the bandwidth utilization and/or the aggregate message load. Accordingly, compression features can be activated or deactivated based upon a utilization threshold parameter, and gateways can be regulated uniformly or independently from one another.

Abstract: The claimed subject matter relates to an architecture that can provide substantially lossless compression and subsequent decompression of messages at an application level. In particular, the architecture, in one aspect thereof, can receive a set of messages. When application data for received messages does not match stored message, the message can be stored to a buffer. In contrast, if application data matches that for a stored message, the received message can be discarded and a message count incremented. The compressed message pattern can include the stored message and the message count. Upon decompression, the number of messages received can be identified by the message count and the application data can be readily recreated for all messages by copying that data. Non-application data, such as time stamp information can be reconstructed based upon a buffer period, other timing offset data, or other data fields included in the message pattern.

Abstract: A method for calculating a multi-point VLAN latency measure. The method includes receiving a plurality of links for a VLAN. Each link has a first side and a second side and includes a latency value, a count of access switches on the first side of the link and a count of access switches on the second side of the link. A latency counter is initialized to zero. For each link in the VLAN, the count of access switches on the first side of the link is multiplied by the count of access switches on the second side of the link to derive a count of paths that include the link. The count of paths that include the link is multiplied by the latency value associated with the link to derive a total latency for the link. The latency counter is incremented by the total latency value for the link. Once all of the links have been processed, the latency counter is divided by the number of paths in the VLAN to derive the multi-point VLAN latency measure for the VLAN.

Abstract: A method for calculating a multi-point VLAN latency measure. The method includes receiving a plurality of links for a VLAN. Each link has a first side and a second side and includes a latency value, a count of access switches on the first side of the link and a count of access switches on the second side of the link. A latency counter is initialized to zero. For each link in the VLAN, the count of access switches on the first side of the link is multiplied by the count of access switches on the second side of the link to derive a count of paths that include the link. The count of paths that include the link is multiplied by the latency value associated with the link to derive a total latency for the link. The latency counter is incremented by the total latency value for the link. Once all of the links have been processed, the latency counter is divided by the number of paths in the VLAN to derive the multi-point VLAN latency measure for the VLAN.