Patents by Inventor David GUILLON
David GUILLON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12218192Abstract: A method can be used for manufacturing a metal substrate structure for a semiconductor power module. A plurality of terminals are welded to a metal top layer. After the welding, a dielectric layer is coupled between the metal top layer and a metal bottom layer. The dielectric can be laminated or molded, as examples.Type: GrantFiled: March 28, 2022Date of Patent: February 4, 2025Assignee: Hitachi Energy LtdInventors: David Guillon, Harald Beyer, Roman Ehrbar
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Patent number: 12094791Abstract: A power semiconductor device includes a semiconductor wafer having a junction and a junction termination laterally surrounding the junction. A protection layer covers the lateral side of the semiconductor wafer and covers the second main side at least in an area of the junction termination. A first metal disk is arranged on the first main side to cover the first main side of the semiconductor wafer. An interface between the first metal disk and the semiconductor wafer is a free floating interface. A metal layer sandwiched between the first metal disk and the semiconductor wafer.Type: GrantFiled: October 10, 2019Date of Patent: September 17, 2024Assignee: Hitachi Energy LtdInventors: Jagoda Dobrzynska, Jan Vobecky, David Guillon, Tobias Wikstroem
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Publication number: 20240186199Abstract: A semiconductor power module for a semiconductor device comprises a leadframe or substrate and a resin body that is coupled to the leadframe or substrate. The resin body includes at least a first resin element and a second resin element, wherein a resin material of the first resin element is different from a resin material of the second resin element. The resin elements are configured such that they are separated in part at least with respect to surface areas facing each other by means of a recess.Type: ApplicationFiled: March 10, 2022Publication date: June 6, 2024Inventors: David GUILLON, Fabian MOHN
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Publication number: 20240063080Abstract: A semiconductor power module comprises a metal substrate structure with a metal top layer, a metal bottom layer, and a dielectric layer in between. A housing with a top wall and side walls is coupled to the metal substrate structure. With respect to a stacking direction, there is a predetermined distance between a lower surface of the top wall and an upper surface of the metal top layer adjacent to the side walls. At least one terminal is arranged inside the housing, and is coupled to the lower surface of the top wall and to the upper surface of the metal top layer. With respect to the stacking direction, a length of the terminal is configured in coordination with the distance, such that due to the terminal, the metal substrate structure is bent in a predetermined manner and comprises a convex shape in interaction with the housing and the terminal.Type: ApplicationFiled: April 28, 2022Publication date: February 22, 2024Inventors: David GUILLON, Martin BAYER, Andreas ROESCH, Giovanni SALVATORE, Fabian FISCHER
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Publication number: 20230420271Abstract: A semiconductor power module (10) and method of manufacture thereof comprises a substrate layer (11) forming a baseplate and a molded body coupled thereto. The molded body has at least one fiber and/or mesh structure forming a local reinforcement portion embedded in the molded body. The semiconductor power module may be part of a semiconductor device having electronics coupled with the semiconductor power module (10).Type: ApplicationFiled: September 8, 2023Publication date: December 28, 2023Inventors: Harald BEYER, David GUILLON, Roman EHRBAR
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Publication number: 20220344456Abstract: A method can be used for manufacturing a metal substrate structure for a semiconductor power module. A plurality of terminals are welded to a metal top layer. After the welding, a dielectric layer is coupled between the metal top layer and a metal bottom layer. The dielectric can be laminated or molded, as examples.Type: ApplicationFiled: March 28, 2022Publication date: October 27, 2022Inventors: David Guillon, Harald Beyer, Roman Ehrbar
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Publication number: 20220246577Abstract: A terminal can be connected to a substrate for forming a power semiconductor module by using ultrasound welding. The terminal includes a first connection area located at a terminal foot. The first connection area is adapted for connecting the terminal to the substrate. The terminal also includes a second connection area that is located opposite to the first connection area at the terminal foot. The substrate includes a third connection area adapted to be connected to the first connection area.Type: ApplicationFiled: July 23, 2020Publication date: August 4, 2022Inventor: David Guillon
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Patent number: 11362008Abstract: The present invention provides a power semiconductor module, including a substrate having an electric insulating main layer being provided with a structured top metallization and with a bottom metallization, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the main layer together with its top metallization and the at least one power semiconductor device is embedded in a mold compound such that the mold compound includes at least one opening for contacting the at least one contact area, and wherein power semiconductor module includes a housing with circumferential side walls, wherein the side walls are positioned above the main layer of the substrate so that the side walls are only present in a space above a plane through the main layer of the substrate.Type: GrantFiled: January 8, 2020Date of Patent: June 14, 2022Assignee: HITACHI ENERGY SWITZERLAND AGInventors: Dominik Trüssel, Samuel Hartmann, David Guillon
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Publication number: 20210384091Abstract: A power semiconductor device includes a semiconductor wafer having a junction and a junction termination laterally surrounding the junction. A protection layer covers the lateral side of the semiconductor wafer and covers the second main side at least in an area of the junction termination. A first metal disk is arranged on the first main side to cover the first main side of the semiconductor wafer. An interface between the first metal disk and the semiconductor wafer is a free floating interface. A metal layer sandwiched between the first metal disk and the semiconductor wafer.Type: ApplicationFiled: October 10, 2019Publication date: December 9, 2021Inventors: Jagoda Dobrzynska, Jan Vobecky, David Guillon, Tobias Wikstroem
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Patent number: 10854524Abstract: The present application provides a power semiconductor module, including a support which carries at least one power semiconductor device, the support together with the power semiconductor device is at least partly located in a housing, the support and the power semiconductor device are at least partly covered by a sealing material, additionally to the sealing material, a protecting material is provided in the housing, the protecting material is formed from silicon gel and the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material.Type: GrantFiled: August 5, 2019Date of Patent: December 1, 2020Assignee: ABB Schweiz AGInventors: David Guillon, Charalampos Papadopoulos, Dominik Truessel, Fabian Fischer, Samuel Hartmann
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Publication number: 20200144140Abstract: The present invention provides a power semiconductor module, including a substrate having an electric insulating main layer being provided with a structured top metallization and with a bottom metallization, wherein the top metallization is provided with at least one power semiconductor device and at least one contact area, wherein the main layer together with its top metallization and the at least one power semiconductor device is embedded in a mold compound such that the mold compound includes at least one opening for contacting the at least one contact area, and wherein power semiconductor module includes a housing with circumferential side walls, wherein the side walls are positioned above the main layer of the substrate so that the side walls are only present in a space above a plane through the main layer of the substrate.Type: ApplicationFiled: January 8, 2020Publication date: May 7, 2020Inventors: Dominik Trüssel, Samuel Hartmann, David Guillon
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Publication number: 20190363029Abstract: The present application provides a power semiconductor module, including a support which carries at least one power semiconductor device, the support together with the power semiconductor device is at least partly located in a housing, the support and the power semiconductor device are at least partly covered by a sealing material, additionally to the sealing material, a protecting material is provided in the housing, the protecting material is formed from silicon gel and the protecting material at least partly covers at least one of the support, the power semiconductor device and the sealing material.Type: ApplicationFiled: August 5, 2019Publication date: November 28, 2019Inventors: David Guillon, Charalampos Papadopoulos, Dominik Truessel, Fabian Fischer, Samuel Hartmann
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Patent number: 9984948Abstract: A power electronics module includes: a baseplate, a power semiconductor chip arranged on the baseplate, and an encapsulation structure arranged on the baseplate and configured to encapsulate the power semiconductor chip, wherein the encapsulation structure is an epoxy having an elastic modulus in a range of 1 to 20 Giga Pascal, GPa, at room temperature and a coefficient of thermal expansion less than 20 ppm/K.Type: GrantFiled: May 4, 2017Date of Patent: May 29, 2018Assignee: ABB Schweiz AGInventors: David Guillon, Heinz Lendenmann, Hui Huang
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Patent number: 9975194Abstract: The present invention relates to a method of connecting two components by ultrasonic welding for producing a power semiconductor module, said method comprising the steps of: a) Aligning the components to be welded to form a welding interface; b) Aligning a welding tool to the aligned components; c) Removably arranging a trapping material at least partly encompassing the welding interface, whereby the trapping material is a foam; and d) Connecting the components by activating the welding tool. The method like described above provides an easy and cost-saving measure in order to prevent particle contamination when performing a welding process such as particularly an ultrasonic welding process sue to scattered particles.Type: GrantFiled: March 11, 2016Date of Patent: May 22, 2018Assignee: ABB Schweiz AGInventors: Venkatesh Sivasubramaniam, David Guillon, Dominik Trüssel, Markus Thut, Samuel Hartman
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Patent number: 9949385Abstract: A semiconductor module includes a base plate, a substrate on the base plate and carrying at least one semiconductor chip, a housing attached to the base plate and at least partially enclosing the substrate, and at least one terminal having one end which protrudes from the housing and another end which has a terminal foot attached on a terminal pad of the metallization by means of ultrasonic welding. The housing has a protective wall which encloses the terminal and divides an interior space of the housing into an unprotected region and a protected region. The protective wall is formed such that a gap is formed between the substrate and the protective wall. The gap is designed to carry a fluid flow such that particles produced during the ultrasonic welding of the terminal foot to the terminal pad are prevented from penetrating into the protected region from the unprotected region.Type: GrantFiled: July 2, 2015Date of Patent: April 17, 2018Assignee: ABB Schweiz AGInventors: Samuel Hartmann, David Guillon, David Hajas, Markus Thut
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Publication number: 20170365535Abstract: The present disclosure relates to a high voltage power electronics module for subsea applications. The power electronics module includes: a baseplate, a power semiconductor chip arranged on the baseplate, and an encapsulation structure arranged on the baseplate and configured to encapsulate the power semiconductor chip, wherein the encapsulation structure is an epoxy having an elastic modulus less in a range of 1 to 20 Giga Pascal, GPa, at room temperature and a coefficient of thermal expansion less than 20 ppm/K.Type: ApplicationFiled: May 4, 2017Publication date: December 21, 2017Inventors: David Guillon, Heinz Lendenmann, Hui Huang
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Publication number: 20170323801Abstract: The present application relates to a method of generating a power semiconductor module including a carrier layer and a substrate having a terminal connection area, the method comprising: soldering the substrate to the carrier layer by forming a solder layer; wherein the solder layer is formed such, that a pre-defined cavity is provided in the solder layer adjacent to the substrate and located opposite to the terminal connection area; and welding a terminal to the terminal connection area of the substrate. The present application provides a method of generating a power semiconductor module which is especially cost-saving to perform and allows a reliable generation of high quality modules.Type: ApplicationFiled: July 24, 2017Publication date: November 9, 2017Inventors: Venkatesh Sivasubramaniam, David Guillon, Pauline Morin, Remi-Alain Guillemin, Samuel Hartmann
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Publication number: 20160193678Abstract: The present invention relates to a method of connecting two components by ultrasonic welding for producing a power semiconductor module, said method comprising the steps of: a) Aligning the components to be welded to form a welding interface; b) Aligning a welding tool to the aligned components; c) Removably arranging a trapping material at least partly encompassing the welding interface, whereby the trapping material is a foam; and d) Connecting the components by activating the welding tool. The method like described above provides an easy and cost-saving measure in order to prevent particle contamination when performing a welding process such as particularly an ultrasonic welding process sue to scattered particles.Type: ApplicationFiled: March 11, 2016Publication date: July 7, 2016Inventors: Venkatesh Sivasubramaniam, David Guillon, Dominik Trüssel, Markus Thut, Samuel Hartman
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Publication number: 20160007485Abstract: A semiconductor module includes a base plate, a substrate on the base plate and carrying at least one semiconductor chip, a housing attached to the base plate and at least partially enclosing the substrate, and at least one terminal having one end which protrudes from the housing and another end which has a terminal foot attached on a terminal pad of the metallization by means of ultrasonic welding. The housing has a protective wall which encloses the terminal and divides an interior space of the housing into an unprotected region and a protected region. The protective wall is formed such that a gap is formed between the substrate and the protective wall. The gap is designed to carry a fluid flow such that particles produced during the ultrasonic welding of the terminal foot to the terminal pad are prevented from penetrating into the protected region from the unprotected region.Type: ApplicationFiled: July 2, 2015Publication date: January 7, 2016Applicant: ABB TECHNOLOGY AGInventors: Samuel HARTMANN, David GUILLON, David HAJAS, Markus THUT