Abstract: A cryogenic cooling system comprises a vacuum chamber, a first support system for cold plates in said vacuum chamber, and a second support system for heat radiation shields in said vacuum chamber. Coupled to said first support system and supported thereby are a plurality of mutually parallel cold plates displaced from each other in a first direction. Said first direction is defined as the direction perpendicular to said cold plates. Coupled to said second support system and supported thereby are a plurality of at least partially nested heat radiation shields. Each of said heat radiation shields is configured to shield a respective sub-space adjacent to a corresponding one of said cold plates. At least a first cold plate of said cold plates is a modular cold plate comprising two or more sections adjacent to each other on the same level in said first direction, said sections being coupled to said first support system independently of each other.

Abstract: A cryogenic cooling system comprises a vacuum chamber, a first support system for cold plates in said vacuum chamber, and a second support system for heat radiation shields in said vacuum chamber. Coupled to said first support system and supported thereby are a plurality of mutually parallel cold plates displaced from each other in a first direction. Said first direction is defined as the direction perpendicular to said cold plates. Coupled to said second support system and supported thereby are a plurality of at least partially nested heat radiation shields. Each of said heat radiation shields is configured to shield a respective sub-space adjacent to a corresponding one of said cold plates. At least a first cold plate of said cold plates is a modular cold plate comprising two or more sections adjacent to each other on the same level in said first direction, said sections being coupled to said first support system independently of each other.

Abstract: A testing device (100) is for electrically testing integrated circuits on a wafer (102). The testing device (100) includes a vacuum chamber (109), a chuck (101) for holding the wafer (102), a probe card (103) for electrically contacting the integrated circuits, and a radiation shield (107) arranged inside the vacuum chamber (109) and enclosing the chuck (101) and the probe card (103). In the testing device (100), the vacuum chamber (109) is provided with a gate valve (123), the radiation shield (107) is provided with a hatch (122), and the testing device (100) includes a wafer loading assembly (125) for loading the wafer (102) onto the chuck (101) through the gate valve (123) and the hatch (122).

Abstract: The present invention provides a testing device for electrically testing integrated circuits on a wafer. The testing device comprises a vacuum chamber, a chuck for holding the wafer, a probe card for electrically contacting the integrated circuits, means for moving the chuck relative to the probe card, a first radiation shield arranged inside the vacuum chamber and enclosing the chuck and the probe card, and a cooling unit thermally connected to the first radiation shield. The means for moving the chuck relative to the probe card comprises a supporting column having a first end and a second end, the first end of the supporting column being attached to the chuck, and the first radiation shield comprises a first fixed part having a first aperture through which the supporting column is arranged to pass, and a first movable part that is attached to the supporting column and arranged to cover the first aperture.

Abstract: The present invention provides a testing device for electrically testing integrated circuits on a wafer. The testing device comprises a vacuum chamber, a chuck for holding the wafer, a probe card for electrically contacting the integrated circuits, and a radiation shield arranged inside the vacuum chamber and enclosing the chuck and the probe card. In the testing device, the vacuum chamber is provided with a gate valve, the radiation shield is provided with a hatch, and the testing device comprises a wafer loading assembly for loading the wafer onto the chuck through the gate valve and the hatch.

Abstract: The present invention provides a testing device for electrically testing integrated circuits on a wafer. The testing device comprises a vacuum chamber, a chuck for holding the wafer, a probe card for electrically contacting the integrated circuits, means for moving the chuck relative to the probe card, a first radiation shield arranged inside the vacuum chamber and enclosing the chuck and the probe card, and a cooling unit thermally connected to the first radiation shield. The means for moving the chuck relative to the probe card comprises a supporting column having a first end and a second end, the first end of the supporting column being attached to the chuck, and the first radiation shield comprises a first fixed part having a first aperture through which the supporting column is arranged to pass, and a first movable part that is attached to the supporting column and arranged to cover the first aperture.

Abstract: A bolometer is described. A bolometer includes a superconductor-insulator-semiconductor-superconductor structure or a superconductor-insulator-semiconductor-insulator-superconductor structure. The semiconductor comprises an electron gas in a layer of silicon, germanium or silicon-germanium alloy in which valley degeneracy is at least partially lifted. The insulator or a one or both of the insulators may comprise a layer of dielectric material. The insulator or a one or both of the insulators may comprise a layer of non-degenerately doped semiconductor.

Abstract: A bolometer is described. A bolometer includes a superconductor-insulator-semiconductor-superconductor structure or a superconductor-insulator-semiconductor-insulator-superconductor structure. The semiconductor comprises an electron gas in a layer of silicon, germanium or silicon-germanium alloy in which valley degeneracy is at least partially lifted. The insulator or a one or both of the insulators may comprise a layer of dielectric material. The insulator or a one or both of the insulators may comprise a layer of non-degenerately doped semiconductor.