Patents by Inventor David H. Bartley

David H. Bartley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9552206
    Abstract: Traditionally, providing parallel processing within a multi-core system has been very difficult. Here, however, a system is provided where serial source code is automatically converted into parallel source code, and a processing cluster is reconfigured “on the fly” to accommodate the parallelized code based on an allocation of memory and compute resources. Thus, the processing cluster and its corresponding system programming tool provide a system that can perform parallel processing from a serial program that is transparent to a user. Generally, a control node connected to the address and data leads of a host processor uses messages to control the processing of data in a processing cluster. The cluster includes nodes of parallel processors, shared function memory, a global load/store, and hardware accelerators all connected to the control node by message busses. A crossbar data interconnect routes data to the cluster circuits separate from the message busses.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: January 24, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: William M. Johnson, Murali S. Chinnakonda, Jeffrey L. Nye, Toshio Nagata, John W. Glotzbach, Hamid R. Sheikh, Ajay Jayaraj, Stephen Busch, Shalini Gupta, Robert J.P. Nychka, David H. Bartley, Ganesh Sundararajan
  • Publication number: 20120131309
    Abstract: Traditionally, providing parallel processing within a multi-core system has been very difficult. Here, however, a system in provided where serial source code is automatically converted into parallel source code, and a processing cluster is reconfigured “on the fly” to accommodate the parallelized code based on an allocation of memory and compute resources. Thus, the processing cluster and its corresponding system programming tool provide a system that can perform parallel processing from a serial program that is transparent to a user.
    Type: Application
    Filed: September 14, 2011
    Publication date: May 24, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: William M. Johnson, Murali S. Chinnakonda, Jeffrey L. Nye, Toshio Nagata, John W. Glotzbach, Hamid R. Sheikh, Ajay Jayaraj, Stephen Busch, Shalini Gupta, Robert J.P. Nychka, David H. Bartley, Ganesh Sundararajan
  • Patent number: 7237234
    Abstract: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: June 26, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Elana D. Granston, Jonathan F. Humphreys, David H. Bartley
  • Patent number: 6922829
    Abstract: A method of generating profiled optimized code using user interface (17) that allows a user to visually understand, inspect, and manipulate a compiled application program as a function of compiler options, such as, code size and speed, is provided. A program (11) is compiled in a compiler (13) with two or more compiler options such as size and speed and the resulting executables (14) are profiled (15). The results of the profiles (19) are analyed in a solver (21) for generating sets of useful solutions (23) wherein the sets have methods of compiling at the function level. The useful solutions (23) are displayed (18) at the user interface (17) to allow the user to visually understand, inspect and manipulate compiler options to select compiler options (13a) for the program.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: July 26, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Alan S. Ward, Reid E. Tatge, Jonathan F. Humphreys, David H. Bartley, Paul C. Fuqua
  • Patent number: 6718544
    Abstract: A user interface that allows a user to visually understand, inspect, and manipulate a compiled application program as a function of compiler options, such as, code size and speed, is provided.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: April 6, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Jonathan F. Humphreys, Alan S. Ward, Reid E. Tatge, David H. Bartley, Paul C. Fuqua
  • Publication number: 20030140334
    Abstract: A compiler tool is provided to selectively solicit assistance from a programmer in order to improve optimization of code compiled by the compiler. As a program is being compiled, the compiler keeps track of the places where it could do better if it only knew certain information. The user is presented with one or more pieces of advice that each identify a problem that prevented the compiler from making a particular optimization due to not enough information and one or more suggestions as to how to provide additional information to the compiler. This list is generally filtered so that only a subset of missing information that has a high likelihood of leading to better performance is presented. Other missing information is not requested.
    Type: Application
    Filed: December 12, 2002
    Publication date: July 24, 2003
    Inventors: Elana D. Granston, Jonathan F. Humphreys, David H. Bartley
  • Patent number: 6317820
    Abstract: This invention is a very long instruction word data processor including plural data registers, plural functional units and plural program counters and is selectively operable in either a first or second mode. In the first mode, the data processor executes a single instruction stream. In the second mode, the data processor executes two independent program instruction streams simultaneously. In the second mode the data processor may respond to two instruction streams accessing only corresponding halves of the data registers and function units. Alternatively, the data processor may respond to a first instruction stream including instructions referencing the whole data processor employing A side function units by alternatively dispatching (1) instructions referencing the A side data registers and the A side function units and (2) instructions referencing the B side data registers and the B side function units. In the first mode, the data processor fetches N bits of instructions each cycle.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: November 13, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Jonathan H. Shiell, David H. Bartley
  • Publication number: 20010032332
    Abstract: A method of generating profiled optimized code using user interface (17) that allows a user to visually understand, inspect, and manipulate a compiled application program as a function of compiler options, such as, code size and speed, is provided. A program (11) is compiled in a compiler (13) with two or more compiler options such as size and speed and the resulting executables (14) are profiled (15). The results of the profiles (19) are analyed in a solver (21) for generating sets of useful solutions (23) wherein the sets have methods of compiling at the function level. The useful solutions (23) are displayed (18) at the user interface (17) to allow the user to visually understand, inspect and manipulate compiler options to select compiler options (13a) for the program.
    Type: Application
    Filed: January 17, 2001
    Publication date: October 18, 2001
    Inventors: Alan S. Ward, Reid E. Tatge, Jonathan F. Humphreys, David H. Bartley, Paul C. Fuqua
  • Patent number: 5293614
    Abstract: Generally, in one form of the invention, a computer system for executing application programs in hard real-time, comprises a central processing unit (CPU) for executing the application programs and system programs and a computer memory partitioned into a data memory and a code memory. A garbage collector, which executes on said CPU, places a write barrier over certain portions of memory. Furthermore, it transfers an object from a location in the memory to a second object at another location in the memory. In a critical section, which may not be interrupted, it allocates sufficient space for the second object so that the entire contents from the first object can be copied into the second object, and in an interruptable section, it copies the entire contents of the first object into the second object. A write routine is linked into the application programs for updating objects in the computer memory.
    Type: Grant
    Filed: April 8, 1991
    Date of Patent: March 8, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Edward E. Ferguson, David H. Bartley, Timothy J. McEntee
  • Patent number: 4758944
    Abstract: A pointer, N, indicates an address in a virtual memory space of a demand paged memory including a plurality of virtual address pages and a fixed number of physical memory pages into which blocks of information can be written. A back-up memory store is provided for containing paged-out memory pages. The pointer, N, is advanced along the virtual address pages to indicate the next available virtual address page for allocation, and newly allocated blocks are located on the virtual address page pointed to by said pointer N. Should the necessary space for a block allocation not exist on the page pointed to by said pointer, N, a page which is most recently used and least sparsely utilized is identified from the physical pages onto which blocks have been previously written the block is allocated on that page. If no space remains on the virtual address pages in physical memory for block allocation, then, a least recently used and most sparsely allocated page is identified and paged-out to the back-up store.
    Type: Grant
    Filed: August 24, 1984
    Date of Patent: July 19, 1988
    Assignee: Texas Instruments Incorporated
    Inventors: David H. Bartley, Timothy J. McEntee, Donald W. Oxley
  • Patent number: 4716524
    Abstract: A reference count decimator and method of operating a computer system includes a decimator queue for containing indications of pointer reference count increments. Apparatus is provided for determining if a referencing event would cause a decrement of a reference count, and for searching the decimator queue to determine if a counterpart of the reference event exists in the queue, to thereby define an increment/decrement pair. If an increment/decrement pair is determined to exist in the queue, the increment/decrement pair is cancelled from the queue so that the increment/decrement point reference pairs are removed from the computer system without actually modifying the reference count indications associated with the memory blocks.
    Type: Grant
    Filed: April 4, 1985
    Date of Patent: December 29, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: Donald W. Oxley, David H. Bartley, Timothy J. McEntee
  • Patent number: 4660130
    Abstract: A method for compacting blocks of memory in a demand paged virtual address space which includes a plurality of virtual address pages includes identifying active and stable blocks to be compacted by defining a pointer to indicate a page of the virtual memory space, and advancing the pointer to continually indicate the page of the beginning of the available virtual memory space. As new blocks are allocated, they are located in the virtual address space beginning at the next available location of the advancing pointer. As blocks are referenced by the user, they are moved to the current location of the advancing pointer, so that, stable blocks may be collected together on stable pages and active blocks are collected together on active pages. A disk memory is provided, and periodically the pages containing collected stable blocks are "paged-out" to it.
    Type: Grant
    Filed: July 24, 1984
    Date of Patent: April 21, 1987
    Assignee: Texas Instruments Incorporated
    Inventors: David H. Bartley, Timothy J. McEntee, Donald W. Oxley, Satish M. Thatte