Patents by Inventor David H. Elwart, II

David H. Elwart, II has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Decay lock loop for time varying current regulation in electric motors
    Patent number: 9647588
    Abstract: A system and method for a decay lock loop for time varying current regulation in electric motors determines if a predetermined electrical current regulation level for an electric motor has been obtained within a tuning control time window. A coarse control loop increases or decreases a fast current decay, in response to a determination that the predetermined electrical current regulation level has not been obtained within the tuning control time window, until the predetermined electrical current regulation level falls within the tuning control time window. A fine control loop increments or decrements an amount of fast current decay during a total decay time, in response to a determination that the predetermined electrical current regulation level has been obtained within the tuning control time window, until a predetermined timing of the predetermined electrical current regulation level has been obtained.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 9, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Sudhir Nagaraj, David H. Elwart, II, Rakesh Raja, Anuj Jain
  • Decay Lock Loop for Time Varying Current Regulation in Electric Motors
    Publication number: 20160254767
    Abstract: A system and method for a decay lock loop for time varying current regulation in electric motors determines if a predetermined electrical current regulation level for an electric motor has been obtained within a tuning control time window. A coarse control loop increases or decreases a fast current decay, in response to a determination that the predetermined electrical current regulation level has not been obtained within the tuning control time window, until the predetermined electrical current regulation level falls within the tuning control time window. A fine control loop increments or decrements an amount of fast current decay during a total decay time, in response to a determination that the predetermined electrical current regulation level has been obtained within the tuning control time window, until a predetermined timing of the predetermined electrical current regulation level has been obtained.
    Type: Application
    Filed: December 30, 2015
    Publication date: September 1, 2016
    Applicant: Texas Instruments Incorporated
    Inventors: Sudhir Nagaraj, David H. Elwart, II, Rakesh Raja, Anuj Jain
  • Negative audio signal voltage protection circuit and method for audio ground circuits
    Patent number: 9136796
    Abstract: Self-grounded circuitry (10) includes a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1).
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: September 15, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: David H. Elwart, II, Vikas Suma Vinay, Christopher M. Graves, Baher S. Haroun
  • Negative Audio Signal Voltage Protection Circuit and Method for Audio Ground Circuits
    Publication number: 20140369520
    Abstract: Self-grounded circuitry (10) includes a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1).
    Type: Application
    Filed: June 18, 2013
    Publication date: December 18, 2014
    Inventors: David H. Elwart, II, Vikas Suma Vinay, Christopher M. Graves, Baher S. Haroun