Abstract: Disclosed is a method, apparatus and system for managing generic objects and storage device objects over a network. In one aspect of the invention, the management apparatus includes a management console having a graphical user interface for displaying a physical view and a logical view of a storage device. The management apparatus further includes a managed object of the storage device that is configured to communicate with the graphical user interface of the management console through a facet interface that is wrapped around the managed object. The facet interface is divided into a plurality of specific facets that communicate with the graphical user interface and enable the display of the physical view and the logical view of the storage device. In a further aspect of the present invention, the graphical user interface includes a plurality of generic views which are configured to communicate with associated ones of the plurality of specific facets of the facet interface.

Abstract: Disclosed is a method, apparatus and system for managing generic objects and storage device objects over a network. In one aspect of the invention, the management apparatus includes a management console having a graphical user interface for displaying a physical view and a logical view of a storage device. The management apparatus further includes a managed object of the storage device that is configured to communicate with the graphical user interface of the management console through a facet interface that is wrapped around the managed object. The facet interface is divided into a plurality of specific facets that communicate with the graphical user interface and enable the display of the physical view and the logical view of the storage device. In a further aspect of the present invention, the graphical user interface includes a plurality of generic views which are configured to communicate with associated ones of the plurality of specific facets of the facet interface.

Abstract: A modular software control system for an I/O subsystem. A central group of software modules are made to be hardware-independent, with interface modules translating from the host hardware configuration and the I/O subsystem hardware configuration. I/O commands are accomplished using a series of specialized threads, with each thread performing a particular function. An appropriate group of threads are assembled for each I/O command, the group being a "net".

Abstract: A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and apparatus for determining, on restoration of power to a device set, whether or not a write operation was interrupted when power was removed, and for reconstructing any data that may be inconsistent because of the removal of power.

Abstract: A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remains constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily controlled by the failed second level controller.

Abstract: A scheduling mechanism is provided for controlling when the arbitration circuit of a node sharing a CSMA communication medium is to start CSMA arbitration for access to the communication medium once the node has a message ready for transmission, the scheduling mechanism delaying the arbitration circuit from seeking access if total transmission activity on the communication medium exceeds a total use threshold value and transmission activity of the node exceeds a local use threshold value, and otherwise permitting the arbitration circuit to seek access to the communication medium by arbitration in accordance with a priority value assigned to the node.

Abstract: A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and apparatus for determining, on restoration of power to a device set, whether or not a write operation was interrupted when power was removed, and for reconstructing any data that may be inconsistent because of the removal of power.

Abstract: A computing system providing resource management in a multiple resource system. In the preferred embodiment, the computing system has a plurality of resources for storing, transmitting or manipulating data. The system also has a fault management subsystem that accesses and operates the resources when the resources are in a first availability state and an operational subsystem for accessing and operating the resources when the resources are in a second availability state. The system has a mechanism for providing real time sharing of any of the resources between the fault management subsystem and the operational subsystem without disrupting the services provided by the operational subsystem. In addition, the system has a mechanism for representing the operational interdependencies of the resources by organizing the resources in a logical structure in which each resource is a node conceptually connected to at least one other resource.

Abstract: A scheduling mechanism is provided for controlling when the arbitration circuit of a node sharing a CSMA communication medium is to start CSMA arbitration for access to the communication medium once the node has a message ready for transmission, the scheduling mechanism delaying the arbitration circuit from seeking access if total transmission activity on the communication medium exceeds a total use threshold value and transmission activity of the node exceeds a local use threshold value, and otherwise permitting the arbitration circuit to seek access to the communication medium by arbitration in accordance with a priority value assigned to the node.

Abstract: A scheduling mechanism is provided for controlling when the arbitration circuit of a node sharing a CSMA communication medium is to start CSMA arbitration for access to the communication medium once the node has a message ready for transmission, the scheduling mechanism delaying the arbitration circuit from seeking access if total transmission activity on the communication medium exceeds a total use threshold value and transmission activity of the node exceeds a local use threshold value, and otherwise permitting the arbitration circuit to seek access to the communication medium by arbitration in accordance with a priority value assigned to the node.

Abstract: A method and apparatus for identifying each of the members of a set of physical mass storage devices acting as one logical mass storage device are provided. Each physical mass storage device is assigned a membership signature identifying it as a valid member of the set. Whenever a member of a set undergoes a change in membership status, the membership signatures of all other devices in the set are changed, so that the member with the changed membership state no longer has a valid signature. When the member is reinstalled, it can be given a new valid signature after it is updated or regenerated.

Abstract: A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remains constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily controlled by the failed second level controller. In addition, the invention provides error check and correction as well as mass storage device configuration circuitry.

Abstract: A computing system providing resource management in a multiple resource system. In the preferred embodiment, the computing system has a plurality of resources for storing, transmitting or manipulating data. The system also has a fault management subsystem that accesses and operates the resources when the resources are in a first availability state and an operational subsystem for accessing and operating the resources when the resources are in a second availability state. The system has a mechanism for providing real time sharing of any of the resources between the fault management subsystem and the operational subsystem without disrupting the services provided by the operational subsystem. In addition, the system has a mechanism for representing the operational interdependencies of the resources by organizing the resources in a logical structure in which each resource is a node conceptually connected to at least one other resource.

Abstract: A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remains constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily controlled by the failed second level controller.

Abstract: A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and apparatus for determining, on restoration of power to a device set, whether or not a write operation was interrupted when power was removed, and for reconstructing any data that may be inconsistent because of the removal of power.

Abstract: A scheduling mechanism is provided for controlling when the arbitration circuit of a node sharing a CSMA communication medium is to start CSMA arbitration for access to the communication medium once the node has a message ready for transmission, the scheduling mechanism delaying the arbitration circuit from seeking access if total transmission activity on the communication medium exceeds a total use threshold value and transmission activity of the node exceeds a local use threshold value, and otherwise permitting the arbitration circuit to seek access to the communication medium by arbitration in accordance with a priority value assigned to the node.

Abstract: A mass storage apparatus, made up of a plurality of physical storage devices, which is capable of providing both high bandwidth and high operation rate, as necessary, along with high reliability, is provided. The device set is divided into one or more redundancy groups. Each redundancy group is in turn divided into one or more data groups, each of which may span only a small number of the drives in the redundancy group, providing a high request rate, or which may span a large number of drives, providing high bandwidth.

Abstract: A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remain constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily contolled by the failed second level controller. In addition, the invention provides error check and correction as well as mass storage device configuration circuitry.