Patents by Inventor David H. Yen
David H. Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7480309Abstract: The network switches and computer readable mediums of the present invention allocate port assignments based on load, that is, the amount of data being forwarded through each port in the group. The load balancing of the present invention is preferably dynamic, that is, packets from a given stream may be forwarded on different ports depending upon each port's current utilization. When a new port is selected to transmit a particular packet stream, it is done so that the packets cannot be forwarded out of order. This is preferably accomplished by ensuring passage of a period of time sufficient to allow all packets of a given stream to be forwarded by a port before a different port is allocated to transmit packets of the same stream. The invention may be used in a variety of different network environments and speeds, including 10Base-T, 100Base-T, and Gigabit Ethernet, and other network environments.Type: GrantFiled: March 7, 2005Date of Patent: January 20, 2009Assignee: Cisco Technology, Inc.Inventors: Gregory L. DeJager, James R. Rivers, David H. Yen, Stewart Findlater, Scott A. Emery
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Patent number: 7031333Abstract: A system and method are disclosed for providing a method of communicating between a media access control (MAC) layer and a physical (PHY) layer. The method includes sending a 100 MHz time-division multiplexed signal on a receive data line and sending a time-division multiplexed receive control signal on a receive control line. A 100 MHz time-division multiplexed signal is sent on a transmit data line and a time-division multiplexed transmit control signal is sent on a transmit control line.Type: GrantFiled: June 2, 1998Date of Patent: April 18, 2006Assignee: Cisco Technology, Inc.Inventors: Stewart Findlater, James R. Rivers, David H. Yen, Brian Petersen
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Patent number: 6934293Abstract: The network switches and computer readable mediums of the present invention allocate port assignments based on load, that is, the amount of data being forwarded through each port in the group. The load balancing of the present invention is preferably dynamic, that is, packets from a given stream may be forwarded on different ports depending upon each port's current utilization. When a new port is selected to transmit a particular packet stream, it is done so that the packets cannot be forwarded out of order. This is preferably accomplished by ensuring passage of a period of time sufficient to allow all packets of a given stream to be forwarded by a port before a different port is allocated to transmit packets of the same stream. The invention may be used in a variety of different network environments and speeds, including 10Base-T, 100Base-T, and Gigabit Ethernet, and other network environments.Type: GrantFiled: October 10, 2003Date of Patent: August 23, 2005Assignee: Cisco Technology, Inc.Inventors: Gregory L. DeJager, James R. Rivers, David H. Yen, Stewart Findlater, Scott A. Emery
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Patent number: 6667975Abstract: Provided are methods, apparatuses and systems for balancing the load of data transmissions through a port aggregation. The methods and apparatuses of the present invention allocate port assignments based on load, that is, the amount of data being forwarded through each port in the group. The load balancing of the present invention is preferably dynamic, that is, packets from a given stream may be forwarded on different ports depending upon each port's current utilization. When a new port is selected to transmit a particular packet stream, it is done so that the packets cannot be forwarded out of order. This is preferably accomplished by ensuring passage of a period of time sufficient to allow all packets of a given stream to be forwarded by a port before a different port is allocated to transmit packets of the same stream. The invention may be used in a variety of different network environments and speeds, including 10Base-T, 100Base-T, and Gigabit Ethernet, and other network environments.Type: GrantFiled: September 19, 2002Date of Patent: December 23, 2003Assignee: Cisco Technology, Inc.Inventors: Gregory L. DeJager, James R. Rivers, David H. Yen, Stewart Findlater, Scott A. Emery
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Patent number: 6631138Abstract: Provided is a 10Base-T MAC to PHY interface requiring only two wires (pins) per port, with two additional global wires: a clock wire (pin), and a synchronization wire (pin). This reduction in the number of pins associated with each port is achieved by time-division multiplexing wherein each time-division multiplexed wire combines a plurality of definitions from the conventional seven-wire interface. As a result, each port has its own pair of associated time-division multiplexed wires (pins) and the addition of each port simply requires two additional wires. According to a preferred embodiment of the present invention, information normally transferred on nine wires in a conventional seven-wire interface at 10 MHz is time-division multiplexed onto two wires (corresponding to two pins) that transfer data at 40 MHz, four times the speed of conventional interfaces. Importantly, this multiplexing is done on a port by port basis.Type: GrantFiled: June 24, 1999Date of Patent: October 7, 2003Assignee: Cisco Technology, Inc.Inventors: Stewart Findlater, James R. Rivers, David H. Yen, Brian Petersen, Bernard N. Daines, David Talaski
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Patent number: 6473424Abstract: Provided are methods, apparatuses and systems for balancing the load of data transmissions through a port aggregation. The methods and apparatuses of the present invention allocate port assignments based on load, that is, the amount of data being forwarded through each port in the group. The load balancing of the present invention is preferably dynamic, that is, packets from a given stream may be forwarded on different ports depending upon each port's current utilization. When a new port is selected to transmit a particular packet stream, it is done so that the packets cannot be forwarded out of order. This is preferably accomplished by ensuring passage of a period of time sufficient to allow all packets of a given stream to be forwarded by a port before a different port is allocated to transmit packets of the same stream. The invention may be used in a variety of different network environments and speeds, including 10Base-T, 100Base-T, and Gigabit Ethernet, and other network environments.Type: GrantFiled: December 2, 1998Date of Patent: October 29, 2002Assignee: Cisco Technology, Inc.Inventors: Gregory L. DeJager, James R. Rivers, David H. Yen, Stewart Findlater, Scott A. Emery
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Patent number: 6078532Abstract: A memory system reducing or eliminating the effects of DRAM page-opening delays or row access delays is provided. The system uses DRAM and fast memory such as SRAM. SRAM is used to store the initial portions of data from data blocks and corresponding portions of DRAM are used to store the terminal portions of data from the data blocks. When access to a block of data is requested, DRAM row access procedures are initiated. During the delay period, while DRAM row access procedures are occurring, the initial portion of data from the requested block is read-out from SRAM. By about the time the initial data read-out from SRAM is completed, DRAM row access procedures are completed and the remaining portion of the data is read-out from DRAM.Type: GrantFiled: February 1, 1999Date of Patent: June 20, 2000Assignee: Cisco Technology Inc.Inventors: James P. Rivers, Gregory L. DeJager, David H. Yen, Stewart Findlater, Bradley Erickson, Scott A. Emery
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Patent number: 5953345Abstract: Provided is a 10Base-T MAC to PHY interface requiring only two wires (pins) per port, with two additional global wires: a clock wire (pin), and a synchronization wire (pin). This reduction in the number of pins associated with each port is achieved by time-division multiplexing wherein each time-division multiplexed wire combines a plurality of definitions from the conventional seven-wire interface. As a result, each port has its own pair of associated time-division multiplexed wires (pins) and the addition of each port simply requires two additional wires. According to a preferred embodiment of the present invention, information normally transferred on nine wires in a conventional seven-wire interface at 10 MHz is time-division multiplexed onto two wires (corresponding to two pins) that transfer data at 40 MHz, four times the speed of conventional interfaces. Importantly, this multiplexing is done on a port by port basis.Type: GrantFiled: June 2, 1998Date of Patent: September 14, 1999Assignee: Cisco Technology, Inc.Inventors: Stewart Findlater, James R. Rivers, David H. Yen, Brian Petersen, Bernard N. Daines, David Talaski
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Patent number: 4008617Abstract: Electronic thermometer and method for determining temperature in which compensation is provided for the localized cooling of a body caused by bringing a sensing element of lower temperature into contact with the body. The output of the sensing element is combined with a signal representative of the initial temperature of the element to compensate for the localized cooling and provide an advance indication of the equilibrium temperature of the body.Type: GrantFiled: December 8, 1975Date of Patent: February 22, 1977Assignee: Filac CorporationInventors: David H. Yen, Tim R. Connely, John J. Lee
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Patent number: 3999434Abstract: A temperature probe assembly including a housing with the temperature probe extending from one end with said end including means for retaining a probe cover. A probe cover ejector extends from the other end of the housing. Spring means within the housing serving to urge said probe and ejector in outwardly extended positions relative to said housing whereby said probe is urged into intimate contact with a probe cover and said ejector is urged in a retracted position. When the ejector is moved into said housing, it extends from the other end to release the retained cover.Type: GrantFiled: January 9, 1975Date of Patent: December 28, 1976Assignee: Filac CorporationInventor: David H. Yen
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Patent number: 3978848Abstract: A combination blood pressure and heart rate monitor is disclosed of the type utilizing a pressure cuff coupled to a patient's artery. Acoustic means is provided and adapted to be placed in a transducing relationship to the artery for providing a sound signal. Pressure transducing means is provided responsive to the average pressure in the cuff and the heart rate pressure provided by the artery for providing an average pressure signal and a heart rate signal. Means is provided for detecting and comparing the sound signal and the heart rate signal for accurately determining, in combination with the average pressure, the patient's systolic and diastolic pressure levels.Type: GrantFiled: January 9, 1975Date of Patent: September 7, 1976Assignee: Filac CorporationInventors: David H. Yen, Tim R. Connelly, John J. Lee
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Patent number: D254629Type: GrantFiled: October 20, 1977Date of Patent: April 1, 1980Assignee: Filac CorporationInventor: David H. Yen