Abstract: An inductor arrangement, comprising: a first pair of driven inductors configured to be driven to generate magnetic fields which are substantially in antiphase, and arranged relative to one another so that their magnetic fields substantially cancel one another at a first null line between those inductors; and a second pair of driven inductors configured to produce magnetic fields which are substantially in antiphase, and arranged relative to one another so that their magnetic fields substantially cancel one another at a second null line between those inductors, wherein the pairs of driven inductors are arranged relative to one another so that the first and second null lines intersect one another, with the first pair of driven inductors located substantially on the second null line and the second pair of inductors located substantially on the first null line.

Abstract: Phase Locked Loop, PLL, circuitry comprising a phase detector configured to generate a first pulse signal comprising at least one first pulse, a property of each first pulse being indicative of a phase difference between a reference signal and a feedback signal; a pulse repeater circuit configured, based on the first pulse signal, to generate a second pulse signal comprising, for each first pulse, a second pulse generated by repeating the corresponding first pulse; and an oscillator configured to generate the feedback signal and control a frequency of the feedback signal based on the second pulse signal.

Abstract: Quadrature oscillator circuitry, comprising: a first differential oscillator circuit having differential output nodes and configured to generate a first pair of differential oscillator signals at those output nodes, respectively; a second differential oscillator circuit having differential output nodes and configured to generate a second pair of differential oscillator signals at those output nodes, respectively; and a cross-coupling circuit connected to cross-couple the first and second differential oscillator circuits. The cross-coupling circuit may comprise a pair of cross-coupled transistors.

Abstract: Phase Locked Loop, PLL, circuitry comprising a phase detector configured to generate a first pulse signal comprising at least one first pulse, a property of each first pulse being indicative of a phase difference between a reference signal and a feedback signal; a pulse repeater circuit configured, based on the first pulse signal, to generate a second pulse signal comprising, for each first pulse, a second pulse generated by repeating the corresponding first pulse; and an oscillator configured to generate the feedback signal and control a frequency of the feedback signal based on the second pulse signal.

Abstract: A leakage-current compensation circuit including: a first node for connection of a first component, a first leakage current flows through the first component and node with a given polarity, the magnitude of the first leakage current dependent on a first potential difference across the first component; a second component connected to a second node with a second leakage current flowing through the second component and node, the magnitude of the second leakage current dependent on a second potential difference across the second component; a current mirror connected to the first and second nodes to cause a compensation current, the magnitude of the compensation current dependent on the magnitude of the second leakage current; a differential amplifier connected in series with the second component along a current path carrying the second leakage current; and an AC coupling superimposing an AC-component of the first potential difference on the second potential difference.

Abstract: Quadrature oscillator circuitry, comprising: a first differential oscillator circuit having differential output nodes and configured to generate a first pair of differential oscillator signals at those output nodes, respectively; a second differential oscillator circuit having differential output nodes and configured to generate a second pair of differential oscillator signals at those output nodes, respectively; and a cross-coupling circuit connected to cross-couple the first and second differential oscillator circuits. The cross-coupling circuit may comprise a pair of cross-coupled transistors.

Abstract: Quadrature oscillator circuitry, comprising: a first differential oscillator circuit having differential output nodes and configured to generate a first pair of differential oscillator signals at those output nodes, respectively; a second differential oscillator circuit having differential output nodes and configured to generate a second pair of differential oscillator signals at those output nodes, respectively; and a cross-coupling circuit connected to cross-couple the first and second differential oscillator circuits. The cross-coupling circuit may comprise a pair of cross-coupled transistors.

Abstract: Transformer circuitry comprising: a transformer having a primary coil and a secondary coil, the primary coil having first and second primary terminals and the secondary coil having first and second secondary terminals, and a secondary coil driver configured to drive a secondary voltage signal V2 across the secondary terminals which has a target relationship with a primary voltage signal V1 driven across the primary terminals by a primary coil driver so that an inductance value measured between the primary terminals is governed by the target relationship.

Abstract: A leakage-current compensation circuit including: a first node for connection of a first component, a first leakage current flows through the first component and node with a given polarity, the magnitude of the first leakage current dependent on a first potential difference across the first component; a second component connected to a second node with a second leakage current flowing through the second component and node, the magnitude of the second leakage current dependent on a second potential difference across the second component; a current mirror connected to the first and second nodes to cause a compensation current, the magnitude of the compensation current dependent on the magnitude of the second leakage current; a differential amplifier connected in series with the second component along a current path carrying the second leakage current; and an AC coupling superimposing an AC-component of the first potential difference on the second potential difference.

Abstract: An inductor arrangement, comprising: a first pair of driven inductors configured to be driven to generate magnetic fields which are substantially in antiphase, and arranged relative to one another so that their magnetic fields substantially cancel one another at a first null line between those inductors; and a second pair of driven inductors configured to produce magnetic fields which are substantially in antiphase, and arranged relative to one another so that their magnetic fields substantially cancel one another at a second null line between those inductors, wherein the pairs of driven inductors are arranged relative to one another so that the first and second null lines intersect one another, with the first pair of driven inductors located substantially on the second null line and the second pair of inductors located substantially on the first null line.

Abstract: Transformer circuitry comprising: a transformer having a primary coil and a secondary coil, the primary coil having first and second primary terminals and the secondary coil having first and second secondary terminals, and a secondary coil driver configured to drive a secondary voltage signal V2 across the secondary terminals which has a target relationship with a primary voltage signal V1 driven across the primary terminals by a primary coil driver so that an inductance value measured between the primary terminals is governed by the target relationship.

Abstract: Quadrature oscillator circuitry, comprising: a first differential oscillator circuit having differential output nodes and configured to generate a first pair of differential oscillator signals at those output nodes, respectively; a second differential oscillator circuit having differential output nodes and configured to generate a second pair of differential oscillator signals at those output nodes, respectively; and a cross-coupling circuit connected to cross-couple the first and second differential oscillator circuits. The cross-coupling circuit may comprise a pair of cross-coupled transistors.

Abstract: Signal-generation circuitry comprises: a differential amplifier comprising first and second input transistors, connected along respective current paths and having control terminals serving as corresponding first and second input terminals of the differential amplifier, and an output terminal at which an amplified signal is output dependent on input signals received at the input terminals; bandgap voltage reference circuitry comprising the first input transistor and a third input transistor whose control terminals are connected together to form a reference terminal at which a bandgap voltage reference signal is generated as a first input signal; and a regulation stage connected to receive the amplified signal output from the differential amplifier and configured to generate a voltage-regulated signal based thereon, and connected to the second input terminal of the differential amplifier so that the second input signal is a feedback signal dependent on the voltage-regulated signal.

Abstract: Charge pump circuitry comprises a differential amplifier and parallel-connected reference, auxiliary and output current paths comprising first current-mirror transistors connected so an auxiliary current and a first output current along a first part of the output current path are dependent on the reference current. The auxiliary and output current paths comprise second-current-mirror transistors connected so a second output current flowing along a second part of the output current path is dependent on the auxiliary current. The auxiliary current path comprises a control transistor connected in series with the first-current-mirror transistor of that path. The differential amplifier receives first and second input signals from nodes in the auxiliary and output current paths, respectively, and controls the control transistor with its amplifier output signal to control the drain or collector voltage of the first-current mirror transistor in the auxiliary path.

Abstract: Signal-generation circuitry comprises: a differential amplifier comprising first and second input transistors, connected along respective current paths and having control terminals serving as corresponding first and second input terminals of the differential amplifier, and an output terminal at which an amplified signal is output dependent on input signals received at the input terminals; bandgap voltage reference circuitry comprising the first input transistor and a third input transistor whose control terminals are connected together to form a reference terminal at which a bandgap voltage reference signal is generated as a first input signal; and a regulation stage connected to receive the amplified signal output from the differential amplifier and configured to generate a voltage-regulated signal based thereon, and connected to the second input terminal of the differential amplifier so that the second input signal is a feedback signal dependent on the voltage-regulated signal.

Abstract: Charge pump circuitry comprises a differential amplifier and parallel-connected reference, auxiliary and output current paths comprising first current-mirror transistors connected so an auxiliary current and a first output current along a first part of the output current path are dependent on the reference current. The auxiliary and output current paths comprise second-current-mirror transistors connected so a second output current flowing along a second part of the output current path is dependent on the auxiliary current. The auxiliary current path comprises a control transistor connected in series with the first-current-mirror transistor of that path. The differential amplifier receives first and second input signals from nodes in the auxiliary and output current paths, respectively, and controls the control transistor with its amplifier output signal to control the drain or collector voltage of the first-current mirror transistor in the auxiliary path.