Patents by Inventor David Harnishfeger

David Harnishfeger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9488529
    Abstract: A temperature measurement system is disclosed. In accordance with some embodiments of the present disclosure, a temperature measurement system may comprise a resistor, a thermistor, a resistance-to-current converter configured to generate a current signal based on a resistance, an analog-to-digital converter (ADC) configured to receive a first current signal based on the resistor, convert the first current signal into a first digital signal, receive a second current signal based on the thermistor, and convert the second current signal into a second digital signal, and a calculation stage communicatively coupled to an ADC output and configured to determine a first digital value based on the first digital signal, determine a second digital value based on the second digital signal, calculate a resistance ratio based on the first digital value and the second digital value, and determine a temperature output value based on the resistance ratio.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: November 8, 2016
    Assignee: Intel IP Corporation
    Inventors: Merit Hong, David Harnishfeger, Kris Kaufman
  • Patent number: 9490825
    Abstract: A circuit may include a digitally-controlled oscillator including a coarse frequency-tuning array with a multiple selectable coarse frequency-tuning segments. Each of the coarse frequency-tuning segments may have a coarse segment frequency step size. The digitally-controlled oscillator may also include a fine frequency-tuning array with multiple selectable fine frequency-tuning segments. The fine frequency-tuning array may have a fine array frequency step size that is at least twice the coarse segment frequency step size. The digitally-controlled oscillator may be configured to generate an output signal with a frequency based on the coarse frequency-tuning array and the fine frequency-tuning array.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: November 8, 2016
    Assignee: Intel IP Corporation
    Inventors: Claudio Rey, David Harnishfeger, Darin Nguyen
  • Patent number: 9470585
    Abstract: In accordance with some embodiments of the present disclosure, a calibrated temperature measurement system comprises a resistor, a thermistor, a resistance-to-current converter configured to generate a current signal based on a resistance, and an analog-to-digital converter (ADC) configured to receive a first current signal based on the resistor, convert the first current signal into a first digital signal, receive a second current signal based on the thermistor, and convert the second current signal into a second digital signal. A memory may comprise resistor-characterization information. A calculation stage communicatively coupled to an ADC output may be configured to determine a first digital value based on the first digital signal, determine a second digital value based on the second digital signal, calculate a resistance ratio based on the first digital value and the second digital value, and determine a temperature output value based on the resistance ratio and the resistor-characterization information.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: October 18, 2016
    Assignee: Intel IP Corporation
    Inventors: Merit Hong, David Harnishfeger, Kris Kaufman
  • Patent number: 9322719
    Abstract: A temperature-measurement input stage may include a resistor, a thermistor, a first multiplexor, an amplifier, a second multiplexor, and an output stage. The first multiplexor may be configured to couple the resistor to a first amplifier input during a first multiplexor state, and couple the thermistor to the first amplifier input during a second multiplexor state. The amplifier may comprise the first amplifier input, a second amplifier input coupled to a voltage reference, and an amplifier output coupled to a feedback path. The second multiplexor may be configured to route a feedback current to the resistor during the first multiplexor state and route the feedback current to the thermistor during the second multiplexor state. The output stage may be configured to provide an output current based on the feedback current.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 26, 2016
    Assignee: Intel IP Corporation
    Inventors: Merit Hong, David Harnishfeger, Kris Kaufman
  • Patent number: 9106327
    Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured. The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: August 11, 2015
    Assignee: Intel IP Corporation
    Inventors: David Harnishfeger, Kris K. Kaufman
  • Patent number: 9055594
    Abstract: A method of generating a transmission signal may include mixing a baseband signal assigned for transmission within a narrow frequency range (“assigned narrow frequency range”) included in a wireless communication channel to produce a shifted signal. The shifted signal may have a shifted frequency that is based on a shift from the assigned narrow frequency range toward a center frequency of the wireless communication channel by a frequency offset. The method may further include shifting a modulation frequency of a modulating signal toward the assigned narrow frequency range frequency range and away from the center frequency by the frequency offset. Additionally, the method may include mixing the shifted signal with the modulating signal to produce a transmission signal having a transmission frequency within the assigned narrow frequency range.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: June 9, 2015
    Assignee: Intel IP Corporation
    Inventors: Claudio Rey, David Harnishfeger, Daniel B. Schwartz
  • Patent number: 8934504
    Abstract: In accordance with some embodiments of the present disclosure, a method may include determining a range of frequencies allocated to resource blocks to be transmitted during a subsequent sub-frame slot or sounding reference symbol sub-slot. The method may also include determining an approximate center frequency of the range of frequencies. The method may additionally include modulating resource blocks of the sub-frame or sounding reference symbol sub-slot at the approximate center frequency. The method may further include transmitting the modulated resource blocks at the approximate center frequency.
    Type: Grant
    Filed: August 12, 2011
    Date of Patent: January 13, 2015
    Assignee: Intel IP Corporation
    Inventors: Daniel B. Schwartz, David Harnishfeger, Jeffrey D. Ganger, George B. Norris, Bing Xu, Mark Alan Kirschenmann, Claudio Rey
  • Patent number: 8922253
    Abstract: A circuit may include an oscillator configured to generate an output signal based on an analog signal and a digital signal and a controller configured to generate an offset signal based on a comparison of a first analog control signal and a second analog control signal. The circuit may also include a divider configured to generate a feedback signal based on the output signal and the offset signal. The circuit may also include an analog control signal unit configured to generate the second analog control signal based on the feedback signal and a reference signal and a coupling unit configured to select either the first analog control signal or the second analog control signal as the analog signal.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: December 30, 2014
    Assignee: Intel IP Corporation
    Inventors: Claudio Rey, David Harnishfeger
  • Publication number: 20140378073
    Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured. The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.
    Type: Application
    Filed: September 5, 2014
    Publication date: December 25, 2014
    Inventors: David Harnishfeger, Kris K. Kaufman
  • Publication number: 20140364132
    Abstract: A method of generating a transmission signal may include mixing a baseband signal assigned for transmission within a narrow frequency range (“assigned narrow frequency range”) included in a wireless communication channel to produce a shifted signal. The shifted signal may have a shifted frequency that is based on a shift from the assigned narrow frequency range toward a center frequency of the wireless communication channel by a frequency offset. The method may further include shifting a modulation frequency of a modulating signal toward the assigned narrow frequency range frequency range and away from the center frequency by the frequency offset. Additionally, the method may include mixing the shifted signal with the modulating signal to produce a transmission signal having a transmission frequency within the assigned narrow frequency range.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 11, 2014
    Inventors: Claudio REY, David HARNISHFEGER, Daniel B. SCHWARTZ
  • Publication number: 20140355650
    Abstract: A temperature measurement system is disclosed. In accordance with some embodiments of the present disclosure, a temperature measurement system may comprise a resistor, a thermistor, a resistance-to-current converter configured to generate a current signal based on a resistance, an analog-to-digital converter (ADC) configured to receive a first current signal based on the resistor, convert the first current signal into a first digital signal, receive a second current signal based on the thermistor, and convert the second current signal into a second digital signal, and a calculation stage communicatively coupled to an ADC output and configured to determine a first digital value based on the first digital signal, determine a second digital value based on the second digital signal, calculate a resistance ratio based on the first digital value and the second digital value, and determine a temperature output value based on the resistance ratio.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 4, 2014
    Inventors: Merit Hong, David Harnishfeger, Kris Kaufman
  • Publication number: 20140355651
    Abstract: In accordance with some embodiments of the present disclosure, a calibrated temperature measurement system comprises a resistor, a thermistor, a resistance-to-current converter configured to generate a current signal based on a resistance, and an analog-to-digital converter (ADC) configured to receive a first current signal based on the resistor, convert the first current signal into a first digital signal, receive a second current signal based on the thermistor, and convert the second current signal into a second digital signal. A memory may comprise resistor-characterization information. A calculation stage communicatively coupled to an ADC output may be configured to determine a first digital value based on the first digital signal, determine a second digital value based on the second digital signal, calculate a resistance ratio based on the first digital value and the second digital value, and determine a temperature output value based on the resistance ratio and the resistor-characterization information.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 4, 2014
    Applicant: Intel IP Corporation
    Inventors: Merit Hong, David Harnishfeger, Kris Kaufman
  • Publication number: 20140354308
    Abstract: A temperature-measurement input stage is disclosed. In accordance with some embodiments of the present disclosure, a temperature-measurement input stage may comprise a resistor, a thermistor, a first multiplexor, an amplifier, a second multiplexor, and an output stage. The first multiplexor may be configured to couple the resistor to a first amplifier input during a first multiplexor state, and couple the thermistor to the first amplifier input during a second multiplexor state. The amplifier may comprise the first amplifier input, a second amplifier input coupled to a voltage reference, and an amplifier output coupled to a feedback path. The second multiplexor may be configured to route a feedback current to the resistor during the first multiplexor state and route the feedback current to the thermistor during the second multiplexor state. The output stage may be configured to provide an output current based on the feedback current.
    Type: Application
    Filed: May 29, 2013
    Publication date: December 4, 2014
    Inventors: Merit Hong, David Harnishfeger, Kris Kaufman
  • Publication number: 20140347137
    Abstract: A circuit may include a digitally-controlled oscillator including a coarse frequency-tuning array with a multiple selectable coarse frequency-tuning segments. Each of the coarse frequency-tuning segments may have a coarse segment frequency step size. The digitally-controlled oscillator may also include a fine frequency-tuning array with multiple selectable fine frequency-tuning segments. The fine frequency-tuning array may have a fine array frequency step size that is at least twice the coarse segment frequency step size. The digitally-controlled oscillator may be configured to generate an output signal with a frequency based on the coarse frequency-tuning array and the fine frequency-tuning array.
    Type: Application
    Filed: May 23, 2013
    Publication date: November 27, 2014
    Applicant: Intel IP Corporation
    Inventors: Claudio REY, David HARNISHFEGER, Darin NGUYEN
  • Publication number: 20140347109
    Abstract: A circuit may include an oscillator configured to generate an output signal based on an analog signal and a digital signal and a controller configured to generate an offset signal based on a comparison of a first analog control signal and a second analog control signal. The circuit may also include a divider configured to generate a feedback signal based on the output signal and the offset signal. The circuit may also include an analog control signal unit configured to generate the second analog control signal based on the feedback signal and a reference signal and a coupling unit configured to select either the first analog control signal or the second analog control signal as the analog signal.
    Type: Application
    Filed: May 24, 2013
    Publication date: November 27, 2014
    Applicant: Intel IP Corporation
    Inventors: Claudio REY, David HARNISHFEGER
  • Publication number: 20140340131
    Abstract: A circuit may include a phase detector configured to generate a phase error signal based on a feedback signal and an oscillator configured to generate an output signal. The feedback signal may be based on the output signal. The circuit may also include a determination unit configured to measure a phase of the feedback signal based on the phase error signal when an output of the phase detector and an input of the oscillator are communicatively decoupled. The circuit may also include an adjustment unit configured to subtract the measured phase of the feedback signal from an intermediate signal upon which the output signal is based when the output of the phase detector and the input of the oscillator are communicatively coupled.
    Type: Application
    Filed: May 15, 2013
    Publication date: November 20, 2014
    Applicant: Intel IP Corporation
    Inventors: Claudio REY, David HARNISHFEGER
  • Patent number: 8885788
    Abstract: A circuit may include a phase detector configured to generate a phase error signal based on a feedback signal and an oscillator configured to generate an output signal. The feedback signal may be based on the output signal. The circuit may also include a determination unit configured to measure a phase of the feedback signal based on the phase error signal when an output of the phase detector and an input of the oscillator are communicatively decoupled. The circuit may also include an adjustment unit configured to subtract the measured phase of the feedback signal from an intermediate signal upon which the output signal is based when the output of the phase detector and the input of the oscillator are communicatively coupled.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: November 11, 2014
    Assignee: Intel IP Corporation
    Inventors: Claudio Rey, David Harnishfeger
  • Patent number: 8872558
    Abstract: A method of controlling a hybrid phase-locked loop may include generating a first control signal based on an offset signal and a second control signal and determining a difference between the first and the second control signals. The method may further include adjusting a value of the offset signal based on the difference between the first and the second control signals to drive a level of the first control signal to a level of the second control signal. The method may further include determining when the level of the first control signal crosses the level of the second control signal. After the level of the first control signal crosses the level of the second control signal, the method may include adjusting the value of the offset signal based on a number of occurrences of the level of the first control signal crossing the level of the second control signal.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: October 28, 2014
    Assignee: Intel IP Corporation
    Inventors: Claudio Rey, David Harnishfeger
  • Patent number: 8855579
    Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.
    Type: Grant
    Filed: June 6, 2012
    Date of Patent: October 7, 2014
    Assignee: Intel IP Corporation
    Inventors: David Harnishfeger, Kristopher Kaufman
  • Publication number: 20130331040
    Abstract: A method may include measuring a frequency difference between an actual frequency and an expected frequency associated with a frequency control calibration signal value for each of a plurality of frequency control calibration signal values during a calibration phase. The method may additionally include generating integral non-linearity compensation values based on the frequency differences measured The method may further include generating the applied frequency control signal based on a frequency control calibration signal value received by the digital-to-analog converter during the calibration phase. The method may also include generating a compensated frequency control signal value based on a frequency control signal value received by the integral non-linearity compensation module and an integral non-linearity compensation value associated with the frequency control signal value during an operation phase of the wireless communication element.
    Type: Application
    Filed: June 6, 2012
    Publication date: December 12, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: David Harnishfeger, Kristopher Kaufman