Patents by Inventor David Harrar, II

David Harrar, II has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8624616
    Abstract: A suspended IO trace design for SSP cantilever Read/Write is described. Instead of having the whole I/O trace attached to surface of the cantilever, the cantilever is designed with fish-bone-like support and the I/O traces are anchored to cantilever structures 110 at some specific attachment locations with dielectric insulation in between. This design provides very compliant trace compared to cantilever's see-saw actuation around the torsional beam pivot and is also insensitive to residual stress variations from I/O trace in fabrication.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: January 7, 2014
    Assignee: Intel Corporation
    Inventors: Tsung-Kuan Allen Chou, David Harrar, II
  • Publication number: 20130141131
    Abstract: A suspended IO trace design for SSP cantilever Read/Write is described. Instead of having the whole I/O trace attached to surface of the cantilever, the cantilever is designed with fish-bone-like support and the I/O traces are anchored to cantilever structures 110 at some specific attachment locations with dielectric insulation in between. This design provides very compliant trace compared to cantilever's see-saw actuation around the torsional beam pivot and is also insensitive to residual stress variations from I/O trace in fabrication.
    Type: Application
    Filed: July 1, 2008
    Publication date: June 6, 2013
    Inventors: Tsung-Kuan Allen Chou, David Harrar, II
  • Patent number: 8411550
    Abstract: MEMS storage devices and associated systems and structures are generally described. In one example, a micro-electro-mechanical (MEMS) storage device includes a substrate, a lateral actuation structure coupled with the substrate, a micro-electro-mechanical (MEMS) probe coupled with the lateral actuation structure, the MEMS probe having a first end, a second end having a probe tip, and a longitudinal axis extending between the first end and the second end, wherein the second end can be actuated in a direction substantially normal to a surface of the substrate, and one or more stop beam structures coupled with the lateral actuation structure to restrict motion of the MEMS probe in the direction substantially normal to the surface of the substrate.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: April 2, 2013
    Assignee: Intel Corporation
    Inventors: Tsung-Kuan Allen Chou, David Harrar, II
  • Publication number: 20100103806
    Abstract: MEMS storage devices and associated systems and structures are generally described. In one example, a micro-electro-mechanical (MEMS) storage device includes a substrate, a lateral actuation structure coupled with the substrate, a micro-electro-mechanical (MEMS) probe coupled with the lateral actuation structure, the MEMS probe having a first end, a second end having a probe tip, and a longitudinal axis extending between the first end and the second end, wherein the second end can be actuated in a direction substantially normal to a surface of the substrate, and one or more stop beam structures coupled with the lateral actuation structure to restrict motion of the MEMS probe in the direction substantially normal to the surface of the substrate.
    Type: Application
    Filed: October 27, 2008
    Publication date: April 29, 2010
    Inventors: Tsung-Kuan Allen Chou, David Harrar, II
  • Publication number: 20100039919
    Abstract: An information storage device comprises a media including a ferroelectric layer formed over a conductive layer, a tip substrate including a bottom actuation electrode, the tip substrate arranged opposite the media, and a cantilever connected with the tip substrate at a fulcrum and actuatable toward the media. The cantilever includes a first portion and a second portion, with the fulcrum located between the first portion and the second portion. The first portion is conductive and arranged over the bottom actuation electrode while a top actuation electrode is associated with the second portion so that the top actuation electrode is opposite the media. A first potential is applied to the bottom actuation electrode to generate electrostatic force between the bottom actuation electrode and the first portion and a second potential is applied to the top actuation electrode to generate electrostatic force between the top actuation electrode and the conductive layer.
    Type: Application
    Filed: September 10, 2008
    Publication date: February 18, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Tsung-Kuan Allen Chou, David Harrar, II